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Volumn 20, Issue 2, 2000, Pages 60-70

Xtensa: A configurable and extensible processor

Author keywords

[No Author keywords available]

Indexed keywords

APPLICATION SPECIFIC PROCESSORS; INSTRUCTION SET ARCHITECTURE (ISA); REGISTER-TRANSFER LEVEL (RTL);

EID: 0033884908     PISSN: 02721732     EISSN: None     Source Type: Journal    
DOI: 10.1109/40.848473     Document Type: Article
Times cited : (312)

References (12)
  • 1
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    • (1974) IEEE Trans. on Computers , vol.23 , Issue.8 , pp. 802-807
    • Abd-alla, A.1    Kartlgaard, D.2
  • 2
    • 0018019239 scopus 로고
    • Techniques of Program Execution with a Writable Control Memory
    • Sept.
    • P. Liu and F. Mowle, "Techniques of Program Execution with a Writable Control Memory," IEEE Trans. on Computers, Vol. 27, No. 9, Sept. 1978, pp. 816-827.
    • (1978) IEEE Trans. on Computers , vol.27 , Issue.9 , pp. 816-827
    • Liu, P.1    Mowle, F.2
  • 3
    • 12944322989 scopus 로고
    • doctoral dissertation, Dept. of Computer Science, Carnegie-Mellon Univ., Pittsburgh, Penn.
    • F. Haney, Using a Computer to Design Computer Instruction Sets, doctoral dissertation, Dept. of Computer Science, Carnegie-Mellon Univ., Pittsburgh, Penn., 1968.
    • (1968) Using a Computer to Design Computer Instruction Sets
    • Haney, F.1
  • 4
    • 84948650420 scopus 로고
    • Viewing Instruction Set Design as an Optimization Problem
    • IEEE Computer Society, Los Alamitos, Calif.
    • B. Holmer and A. Despain, "Viewing Instruction Set Design as an Optimization Problem," Proc. 24th Int'l. Symp. on Microarchitecture, IEEE Computer Society, Los Alamitos, Calif., 1991, pp. 172-180.
    • (1991) Proc. 24th Int'l. Symp. on Microarchitecture , pp. 172-180
    • Holmer, B.1    Despain, A.2
  • 5
    • 0028768023 scopus 로고
    • A High-Performance Microarchitecture with Hardware-Programmable Functional Units
    • IEEE Computer Society
    • R. Razdan and M.D. Smith, "A High-Performance Microarchitecture with Hardware-Programmable Functional Units," Proc. Micro-27, IEEE Computer Society, 1994, pp. 172-180.
    • (1994) Proc. Micro-27 , pp. 172-180
    • Razdan, R.1    Smith, M.D.2
  • 6
    • 0031706873 scopus 로고    scopus 로고
    • A 200-MHz 1.2-W 1.4-GFLOPS Microprocessor with Graphics Unit
    • IEEE Press, Piscataway, N.J.
    • O. Nishii et al., "A 200-MHz 1.2-W 1.4-GFLOPS Microprocessor with Graphics Unit," Proc. IEEE Int'l Solid-State Circuits Conf., Vol. 41, IEEE Press, Piscataway, N.J., 1998, pp. 288-289.
    • (1998) Proc. IEEE Int'l Solid-State Circuits Conf. , vol.41 , pp. 288-289
    • Nishii, O.1
  • 7
    • 0031678730 scopus 로고    scopus 로고
    • A Low-Cost 300-MHz RISC CPU with Attached Media Processor
    • IEEE Press
    • S. Santhanam et al., "A Low-Cost 300-MHz RISC CPU with Attached Media Processor," Proc. IEEE Int'l Solid-State Circuits Conf., Vol. 41, IEEE Press, 1998, pp. 298-299.
    • (1998) Proc. IEEE Int'l Solid-State Circuits Conf. , vol.41 , pp. 298-299
    • Santhanam, S.1
  • 8
    • 84867108958 scopus 로고    scopus 로고
    • http://www.arccores.com.
  • 9
    • 0343757826 scopus 로고    scopus 로고
    • A 7th-generation x86 Microprocessor
    • IEEE Press
    • S. Hesley et al., "A 7th-generation x86 Microprocessor," Proc. IEEE Int'l. Solid-State Circuits Conf., Vol. 42, IEEE Press, 1999, pp. 182-183.
    • (1999) Proc. IEEE Int'l. Solid-State Circuits Conf. , vol.42 , pp. 182-183
    • Hesley, S.1
  • 11
    • 0343762482 scopus 로고    scopus 로고
    • Internet-Draft
    • T. Ylonen et al., SSH Protocol Architecture, Internet-Draft, 1998; http://freenic.net/drafts/ drafts-i-j/draft-ietf-secsh-architecture-02.txt.
    • (1998) SSH Protocol Architecture
    • Ylonen, T.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.