Surface passivation technology for III-V semiconductor nanoelectronics

Applied Surface Science

Volumn 255, Issue 3, 2008, Pages 628-632

  Hasegawa, Hideki ^a   Akazawa, Masamichi ^a  

^a HOKKAIDO UNIVERSITY   (Japan)

Author keywords

GaAs; High k dielectric; III V Semiconductor; MOS structure; Nanoelectronics; Surface passivation

Indexed keywords

ALUMINUM ALLOYS; ALUMINUM GALLIUM ARSENIDE; GALLIUM ARSENIDE; HIGH-K DIELECTRIC; III-V SEMICONDUCTORS; INDIUM ALLOYS; MOLECULAR BEAM EPITAXY; NANOELECTRONICS; NANOWIRES; SEMICONDUCTING GALLIUM; SEMICONDUCTING GALLIUM ARSENIDE; SEMICONDUCTING INDIUM GALLIUM ARSENIDE; SEMICONDUCTING SILICON; SEMICONDUCTOR ALLOYS;

GAAS; GAAS NANOWIRES; INTERFACE CONTROL LAYER; KEY ISSUES; MOS STRUCTURE; PRESENT STATUS; SURFACE PASSIVATION; ULTRA-THIN;

PASSIVATION;

EID: 55649116411     PISSN: 01694332     EISSN: None     Source Type: Journal    
DOI: 10.1016/j.apsusc.2008.07.002     Document Type: Article

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