A framework for cosynthesis of memory and communication architectures for MPSoC

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 26, Issue 3, 2007, Pages 408-420

  Pasricha, Sudeep ^a,b   Dutt, Nikil D ^a,b  

^a IEEE   (United States)

^b UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

Communication system performance; Digital systems; High level synthesis; Memory architecture

Indexed keywords

COMMUNICATION SYSTEM PERFORMANCE; DIGITAL SYSTEMS; HIGH-LEVEL SYNTHESIS; MEMORY ARCHITECTURE;

COMPUTER ARCHITECTURE; DECISION MAKING; MULTIPROCESSING SYSTEMS; TELECOMMUNICATION TRAFFIC; WIRELESS TELECOMMUNICATION SYSTEMS;

EMBEDDED SYSTEMS;

EID: 33847701228     PISSN: 02780070     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCAD.2006.884487     Document Type: Conference Paper

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