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Volumn 7, Issue 4, 1999, Pages 433-441

Minimizing the required memory bandwidth in VLSI system realizations

Author keywords

Low power design; Memory; System level; Tradeoffs; Video processing

Indexed keywords

STORAGE BANDWIDTH OPTIMIZATION (SBO);

EID: 0033279857     PISSN: 10638210     EISSN: None     Source Type: Journal    
DOI: 10.1109/92.805750     Document Type: Article
Times cited : (52)

References (21)
  • 1
    • 0028602659 scopus 로고
    • Loop transformation methodology for fixed-rate video, image and telecom processing applications
    • San Francisco, CA, Aug.
    • F. Catthoor, W. Geurts, and H. De Man, "Loop transformation methodology for fixed-rate video, image and telecom processing applications," in Proc. Int. Conf. Applicat. Specific Array Processors, San Francisco, CA, Aug. 1994, pp. 427-438.
    • (1994) Proc. Int. Conf. Applicat. Specific Array Processors , pp. 427-438
    • Catthoor W Geurts, F.1    De Man, H.2
  • 2
    • 0029290289 scopus 로고
    • Portable video-on-demand in wireless communication, special issue on Low power design
    • Apr.
    • T. Meng, B. Gordon, E. Tsern, and A. Hung, "Portable video-on-demand in wireless communication," special issue on "Low power design" Proc. IEEE, vol. 83, pp. 659-680, Apr. 1995.
    • (1995) Proc. IEEE , vol.83 , pp. 659-680
    • Meng, T.1    Gordon, B.2    Tsern, E.3    Hung, A.4
  • 3
    • 0012111580 scopus 로고
    • Background memory management for the synthesis of algebraic algorithms on multi-processor DSP chips
    • Munich, Germany, Aug.
    • I. Verbauwhede, F. Catthoor, J. Vandewalle, and H. De Man, "Background memory management for the synthesis of algebraic algorithms on multi-processor DSP chips," in Proc. Int. Conf. VLSI, Munich, Germany, Aug. 1989, pp. 2098-2118.
    • (1989) Proc. Int. Conf. VLSI , pp. 2098-2118
    • Verbauwhede, I.1    Catthoor, F.2    Vandewalle, J.3    De Man, H.4
  • 5
    • 0028727544 scopus 로고
    • Dataflow-driven memory allocation for multi-dimensional processing systems
    • San Jose, CA, Nov.
    • F. Balasa, F. Catthoor, and H. De Man, "Dataflow-driven memory allocation for multi-dimensional processing systems," in Proc. IEEE Int. Conf. Computer-Aided Design, San Jose, CA, Nov. 1994, pp. 31-34.
    • (1994) Proc. IEEE Int. Conf. Computer-Aided Design , pp. 31-34
    • Balasa, F.1    Catthoor, F.2    De Man, H.3
  • 8
    • 0028723004 scopus 로고
    • Datapath synthesis
    • June
    • L. Stok, "Datapath synthesis," Integr. VLSI J., vol. 18, pp. 1-71, June 1994.
    • (1994) Integr. VLSI J. , vol.18 , pp. 1-71
    • Stok, L.1
  • 9
    • 0024682923 scopus 로고
    • Force-directed scheduling for the behavioral synthesis of ASIC's
    • June
    • P. Paulin and J. Knight, "Force-directed scheduling for the behavioral synthesis of ASIC's," IEEE Trans. Computer-Aided Design, vol. 8, pp. 661-679, June 1989.
    • (1989) IEEE Trans. Computer-Aided Design , vol.8 , pp. 661-679
    • Paulin, P.1    Knight, J.2
  • 11
    • 0002746388 scopus 로고
    • Ph.D. dissertation, Dept. Elect. Eng., Eindhoven Univ. Technol., Eindhoven, The Netherlands, Oct.
    • W. Verhaegh, "Multidimensional periodic scheduling," Ph.D. dissertation, Dept. Elect. Eng., Eindhoven Univ. Technol., Eindhoven, The Netherlands, Oct. 1995.
    • (1995) Multidimensional Periodic Scheduling
    • Verhaegh, W.1
  • 12
    • 0029518878 scopus 로고
    • Push-up scheduling: Optimal polynomial-time resource constrained scheduling for multi-dimensional applications
    • San Jose CA, Nov.
    • N. Passos and E. Sha, "Push-up scheduling: optimal polynomial-time resource constrained scheduling for multi-dimensional applications," in Proc. IEEE Int. Conf. Computer-Aided Design, San Jose CA, Nov. 1995, pp. 588-591.
    • (1995) Proc. IEEE Int. Conf. Computer-Aided Design , pp. 588-591
    • Passos, N.1    Sha, E.2
  • 13
    • 0027797653 scopus 로고
    • Register allocation with instruction scheduling: A new approach
    • Jun.
    • S. Pinter, "Register allocation with instruction scheduling: A new approach," ACM SIGPLAN, vol. 28, pp. 248-257, Jun. 1993.
    • (1993) ACM SIGPLAN , vol.28 , pp. 248-257
    • Pinter, S.1
  • 16
    • 33747847831 scopus 로고
    • A flexible 32 Kbit RAM generator for ASIC's based on process tolerant layout design
    • Grenoble, France, Dec.
    • G. Thierfelder et al., "A flexible 32 Kbit RAM generator for ASIC's based on process tolerant layout design," presented at the Int. Workshop Logic Architecture Synthesis, Grenoble, France, Dec. 1993.
    • (1993) Int. Workshop Logic Architecture Synthesis
    • Thierfelder, G.1
  • 17
    • 0026103250 scopus 로고
    • An area model for on-chip memories and its application
    • Feb.
    • J. M. Mulder, N. T. Quach, and M. J. Flynn, "An area model for on-chip memories and its application," IEEE J. Solid-State Circuits, vol. 26, pp. 98-105, Feb. 1991.
    • (1991) IEEE J. Solid-State Circuits , vol.26 , pp. 98-105
    • Mulder, J.M.1    Quach, N.T.2    Flynn, M.J.3
  • 19
    • 0029530287 scopus 로고
    • Background memory management for dynamic data structures intensive processing systems
    • San Jose, CA, Nov.
    • G. de Jong, B. Lin, C. Verdonck, S. Wuytack, and F. Catthoor, "Background memory management for dynamic data structures intensive processing systems," in Proc. Int. Conf. Computer-Aided Design, San Jose, CA, Nov. 1995, pp. 515-520.
    • (1995) Proc. Int. Conf. Computer-Aided Design , pp. 515-520
    • De Jong, G.1    Lin, B.2    Verdonck, C.3    Wuytack, S.4    Catthoor, F.5
  • 20
    • 0031118953 scopus 로고    scopus 로고
    • Efficient general-purpose image compression with binary tree predictive coding
    • Apr.
    • J. Robinson, "Efficient general-purpose image compression with binary tree predictive coding," IEEE Trans. Image Processing, vol. 6, pp. 601-608, Apr. 1997.
    • (1997) IEEE Trans. Image Processing , vol.6 , pp. 601-608
    • Robinson, J.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.