Data reuse analysis technique for software-controlled memory hierarchies

Proceedings - Design, Automation and Test in Europe Conference and Exhibition

Volumn 1, Issue , 2004, Pages 202-207

  Issenin, Ilya ^a   Brockmeyer, Erik ^b   Miranda, Miguel ^b   Dutt, Nikil ^a  

^a UNIVERSITY OF CALIFORNIA   (United States)

^b IMEC   (Belgium)

Author keywords

[No Author keywords available]

Indexed keywords

BUFFERS; OFF-CHIP MEMORY; SOFTWARE CONTROLLED CACHE; AUTOMATED APPROACH; DATA REUSE ANALYSIS; MEMORY HIERARCHY; MEMORY SUBSYSTEMS; REDUCE ENERGY CONSUMPTION; SCRATCH PAD MEMORY; STREAMING APPLICATIONS;

AUTOMATION; COMPUTER HARDWARE; COMPUTER SOFTWARE; DATA REDUCTION; ENERGY UTILIZATION; HIERARCHICAL SYSTEMS; MULTIMEDIA SYSTEMS; DATA TRANSFER; DIGITAL STORAGE; EXHIBITIONS; MULTIPROCESSING SYSTEMS;

DATA STORAGE EQUIPMENT; CACHE MEMORY;

EID: 3042615493     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/DATE.2004.1268849     Document Type: Conference Paper

References (19)

1. D. F. Bacon, S. L. Graham et al. Compiler Transformations for High-Performance Computing. ACM Computing Surv., 26(4), 1994.
2. R. Banakar, S. Steinke et al. Scratchpad Memory: Design Alternative for Cache On-chip Memory in Embedded Systems. CODES, 2002.
3. E. Brockmeyer, M. Miranda, F. Catthoor, and H. Corporeal. Layer Assignment Techniques for Low Energy in Multi-Layered Memory Organisations. DATE, Germany, 2003.
4. D. Burger and T. M. Austin. The SimpleScalar tool set, version 2.0. In Technical Report 1342, University of Wisconsin-Madison, CS Department, June 1997.
5. J. Diguet, S. Wuytack, F. Catthoor, and H. De Man. Formalized Methodology for Data Reuse Exploration in Hierarchical Memory Mappings. In Proceedings of the IEEE International Symposium on Low Power Design, pages 30-35, Monterey, CA, August 1997.
6. C. Ghez, M. Miranda, A. Vandecappelle, F. Catthoor, D. Verkest. Systematic high-level address code transformations for piece-wise linear indexing: illustration on a medical imaging algorithm. Workshop on Signal Processing Systems, Lafayette LA, Oct. 2000.
7. M. Kandemir and A. Choudhary, Compiler-Directed Scratch Pad Memory Hierarchy Design and Management. DAC, New Orleans, Louisiana, June 2002.
8. th Design Automation Conference, Las Vegas, NV, June 2001.
9. W. Kelly, V. Maslov, W. Pugh, E. Rosser, T. Shipeisman, and D. Wonnacott. The Omega Library interface guide. Tech. Report CS-TR-3445, CS Dept., Univ. of Maryland, College Park, March 1995.
10. C. Kulkarni, M. Miranda, C. Ghez, F. Catthoor, H. De Man. Cache Conscious Data Layout Organization For Embedded Multimedia Applications. DATE, Germany, March 2001.
11. K. Lillevold et al., Telenor R&D, H.263 test model simulation software. Dec. 1995.
12. K. McKinley, S. Carr, and C.-W. Tseng. Improving Data Locality with Loop Transformations. ACM Trans. on Programming Languages and Systems, 18(4), July 1996.
13. P. R. Panda, N. D. Dutt, and A. Nicolau. Efficient Utilization of Scratch-Pad Memory in Embedded Processor Applications. DATE, Paris, March 1997.
14. P. Shivakumar, N. Jouppi. CACTI 3.0: An Integrated Cache Timing, Power, and Area Model. WRL Technical Report 2001/2, Aug. 2001.
15. S. Steinke, L. Wehmeyer, B. Lee, and P. Marwedel. Assigning Program and Data Objects to Scratchpad for Energy Reduction. DATE, Paris, France, March 2002.
16. P. Stobach. A new technique in scene adaptive coding. In Proc. Of EUSIPCO, Grenoble, 1988.
17. T. Van Achteren, F. Catthoor, R. Lauwereins, G. Deconinck. Search Space Definition and Exploration for Nonuniform Data Reuse Opportunities in Data-Dominant Applications. ACM Trans. on Design Automation of Electronic Systems, Vol. 8, No. 1, Jan. 2003.
18. T. Van Achteren, F. Catthoor, R. Lauwereins, and G. Deconinck. Data Reuse Exploration Techniques for Loop-Dominated Applications. In IEEE/ACM Design Automation and Test Conference, Paris, France, 2002.
19. D. K. Wilde. A Library for Doing Polyhedral Operations. Technical Report 785, IRISA Rennes. France, 1993.