Multiobjective microarchitectural floorplanning for 2-D and 3-D ICs

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 26, Issue 1, 2007, Pages 38-51

  Healy, Michael ^a,b   Vittes, Mario ^a,c   Ekpanyapong, Mongkol ^a,b   Ballapuram, Chinnakrishnan S ^b   Lim, Sung Kyu ^a,b   Lee, Hsien Hsin S ^a,b   Loh, Gabriel H ^a,d  

^a IEEE   (United States)

^b GEORGIA INSTITUTE OF TECHNOLOGY   (United States)

^c INTEL CORPORATION   (United States)

^d Georgia Institute of Technology   (United States)

Author keywords

Microarchitectural floorplanning; Performance optimization; Thermal distribution; Three dimensional integrated circuits (3 D ICs)

Indexed keywords

3-D FLOORPLANNING; FUNCTIONAL MODULES; MICROARCHITECTURAL FLOORPLANNING; TRADEOFF MAKING;

ALGORITHMS; LINEAR PROGRAMMING; OPTIMIZATION; RELIABILITY THEORY; SIMULATED ANNEALING;

INTEGRATED CIRCUIT MANUFACTURE;

EID: 33846219890     PISSN: 02780070     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCAD.2006.883925     Document Type: Article

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