Generic system simulator (GENESYS) for ASIC technology and architecture beyond 2001

Proceedings of the Annual IEEE International ASIC Conference and Exhibit

Volumn , Issue , 1996, Pages 193-196

  Eble, John C ^a   De, Vivek K ^a   Wills, D Scott ^a   Meindl, James D ^a  

^a GEORGIA INSTITUTE OF TECHNOLOGY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; COMPUTER SIMULATION; ELECTRONICS PACKAGING; HIERARCHICAL SYSTEMS; INTEGRATED CIRCUIT LAYOUT; MOSFET DEVICES; SEMICONDUCTOR DEVICE MODELS; SEMICONDUCTOR DEVICE STRUCTURES;

CLOCK FREQUENCY; GENERIC SYSTEM SIMULATOR; INTERCONNECT DESIGN; POWER DRAIN;

APPLICATION SPECIFIC INTEGRATED CIRCUITS;

EID: 0029748207     PISSN: 10630988     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (13)