Reliability-aware floorplanning for 3D circuits

Proceedings - IEEE International SOC Conference

Volumn , Issue , 2005, Pages 81-82

  Minz, Jacob ^a   Wong, Eric ^a   Lim, Sung Kyu ^a  

^a GEORGIA INSTITUTE OF TECHNOLOGY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

DECOUPLING CAPACITANCE (DECAP); FLOORPLANNING; POWER SUPPLY NOISE ANALYSIS;

ALGORITHMS; SPURIOUS SIGNAL NOISE;

INTEGRATED CIRCUIT LAYOUT;

EID: 30844467531     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (2)

1. H. Murata, K. Fujiyoshi, S. Nakatake, and Y. Kajitani, "Rectangle packing based module placement," in Proc. IEEE Int. Conf. on Computer-Aided Design, 1995, pp. 472-479.
2. S. Zhao, C. Koh, and K. Roy, "Decoupling capacitance allocation and its application to power supply noise aware flooiplanning," IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems, pp. 81-92, 2002.