-
1
-
-
0036927652
-
Strained silicon MOSFET technology
-
J.L. Hoyt, H.M. Nayfeh, S. Eguchi, I. Aberg, G. Xia, and T. Drake Strained silicon MOSFET technology IEEE IEDM Tech Digest 2002 23 26
-
(2002)
IEEE IEDM Tech Digest
, pp. 23-26
-
-
Hoyt, J.L.1
Nayfeh, H.M.2
Eguchi, S.3
Aberg, I.4
Xia, G.5
Drake, T.6
-
3
-
-
0001038893
-
Band structure, deformation potentials, and carrier mobility in stained Si, Ge and SiGe alloys
-
M.V. Fischetti, and S.E. Laux Band structure, deformation potentials, and carrier mobility in stained Si, Ge and SiGe alloys J Appl Phys 80 4 1996 2234
-
(1996)
J Appl Phys
, vol.80
, Issue.4
, pp. 2234
-
-
Fischetti, M.V.1
Laux, S.E.2
-
4
-
-
0036045608
-
Characteristics and device design of sub-100 nm strained-Si N- and P-MOSFETs
-
K. Rim, J. Chu, K.A. Jenkins, T. Kanarshy, K. Lee, and A. Mocuta Characteristics and device design of sub-100 nm strained-Si N- and P-MOSFETs IEEE VLSI Symp Tech Digest 2002 98
-
(2002)
IEEE VLSI Symp Tech Digest
, pp. 98
-
-
Rim, K.1
Chu, J.2
Jenkins, K.A.3
Kanarshy, T.4
Lee, K.5
Mocuta, A.6
-
5
-
-
0036049563
-
High performance CMOS operation of strained-SOI MOSFETs using thin film SiGe-on-insulator substrate
-
T. Mizuno, N. Sugiyama, T. Tezuka, T. Numata, and S. Takagi High performance CMOS operation of strained-SOI MOSFETs using thin film SiGe-on-insulator substrate IEEE VLSI Symp Tech Digest 2002 106 107
-
(2002)
IEEE VLSI Symp Tech Digest
, pp. 106-107
-
-
Mizuno, T.1
Sugiyama, N.2
Tezuka, T.3
Numata, T.4
Takagi, S.5
-
6
-
-
0034794354
-
Strained Si NMOSFETs for high performance CMOS technology
-
K. Rim, S. Koester, M. Hargrove, J. Chu, P.M. Mooney, and J. Ott Strained Si NMOSFETs for high performance CMOS technology IEEE VLSI Symp Tech Digest 2001 59 60
-
(2001)
IEEE VLSI Symp Tech Digest
, pp. 59-60
-
-
Rim, K.1
Koester, S.2
Hargrove, M.3
Chu, J.4
Mooney, P.M.5
Ott, J.6
-
7
-
-
0035308521
-
Projecting lifetime of deep submicron MOSFETs
-
E. Li, E. Rosenbaum, J. Tao, and P. Fang Projecting lifetime of deep submicron MOSFETs IEEE Trans Electron Dev 48 4 2001 671 678
-
(2001)
IEEE Trans Electron Dev
, vol.48
, Issue.4
, pp. 671-678
-
-
Li, E.1
Rosenbaum, E.2
Tao, J.3
Fang, P.4
-
8
-
-
84886448092
-
A study of hot-carrier degradation in n- and p-MOSFET's with ultra-thin gate oxides in the direct-tunneling regime
-
H.S. Momose, S. Makamura, T. Ohguro, T. Yoshitomi, E. Morifuji, and T. Morimoto A study of hot-carrier degradation in n- and p-MOSFET's with ultra-thin gate oxides in the direct-tunneling regime IEEE IEDM Tech Digest 1997 453 456
-
(1997)
IEEE IEDM Tech Digest
, pp. 453-456
-
-
Momose, H.S.1
Makamura, S.2
Ohguro, T.3
Yoshitomi, T.4
Morifuji, E.5
Morimoto, T.6
-
9
-
-
0033748595
-
Analysis of hot-carrier-induced degradation in MOSFETs by gate-to-drain and gate-to-substrate capacitance measurements
-
April
-
Hsu CT, Lau MM, Yeow YT, Yao ZQ. Analysis of hot-carrier-induced degradation in MOSFETs by gate-to-drain and gate-to-substrate capacitance measurements. Proceedings of IRPS, April 2000. p. 98-102.
-
(2000)
Proceedings of IRPS
, pp. 98-102
-
-
Hsu, C.T.1
Lau, M.M.2
Yeow, Y.T.3
Yao, Z.Q.4
-
13
-
-
0021483045
-
Lucky-electron model of channel hot-electron injection in MOSFET's
-
S. Tam, P.-K. Ko, and C. Hu Lucky-electron model of channel hot-electron injection in MOSFET's IEEE Trans Electron Dev 31 9 1984 1116
-
(1984)
IEEE Trans Electron Dev
, vol.31
, Issue.9
, pp. 1116
-
-
Tam, S.1
Ko, P.-K.2
Hu, C.3
-
14
-
-
4243371827
-
Lucky-electron model of channel hot electron emission
-
C. Hu Lucky-electron model of channel hot electron emission IEEE IEDM Tech Digest 1979 22
-
(1979)
IEEE IEDM Tech Digest
, pp. 22
-
-
Hu, C.1
-
15
-
-
0030216421
-
A pseudo-lucky electron model for simulation of electron gate current in submicron NMOSFET's
-
K. Hasnat, C.-F. Yeap, S. Jallepalli, W.-K. Shih, S.A. Hareland, and V.M. Agostinelli Jr A pseudo-lucky electron model for simulation of electron gate current in submicron NMOSFET's IEEE Trans Electron Dev 43 8 1996 1264
-
(1996)
IEEE Trans Electron Dev
, vol.43
, Issue.8
, pp. 1264
-
-
Hasnat, K.1
Yeap, C.-F.2
Jallepalli, S.3
Shih, W.-K.4
Hareland, S.A.5
Jr, M.A.V.6
-
16
-
-
10644269483
-
Improved hot-electron reliability in strained-Si nMOS
-
D. Onsongo, D.Q. Kelly, S. Dey, R. Wise, R. Cleavelin, and S.K. Banerjee Improved hot-electron reliability in strained-Si nMOS IEEE Trans Electron Dev 51 12 2004 2193
-
(2004)
IEEE Trans Electron Dev
, vol.51
, Issue.12
, pp. 2193
-
-
Onsongo, D.1
Kelly, D.Q.2
Dey, S.3
Wise, R.4
Cleavelin, R.5
Banerjee, S.K.6
-
19
-
-
0141563604
-
Band offset induced threshold variation in strained-Si nMOSFETs
-
J.-S. Goo, Q. Xiang, Y. Takamura, F. Arasnia, E.N. Paton, and P. Besser Band offset induced threshold variation in strained-Si nMOSFETs IEEE Electron Dev Lett 24 9 2003 568 570
-
(2003)
IEEE Electron Dev Lett
, vol.24
, Issue.9
, pp. 568-570
-
-
Goo, J.-S.1
Xiang, Q.2
Takamura, Y.3
Arasnia, F.4
Paton, E.N.5
Besser, P.6
-
20
-
-
20344400446
-
Enhanced hot-electron performance of strained Si NMOS over unstrained Si
-
D.Q. Kelly, D. Onsongo, S. Dey, R. Wise, R. Cleavelin, and S.K. Banerjee Enhanced hot-electron performance of strained Si NMOS over unstrained Si IEEE Int Reliab Phys Symp 2004 455
-
(2004)
IEEE Int Reliab Phys Symp
, pp. 455
-
-
Kelly, D.Q.1
Onsongo, D.2
Dey, S.3
Wise, R.4
Cleavelin, R.5
Banerjee, S.K.6
-
21
-
-
0036610426
-
Measurement of the effect of self-heating in strained-silicon MOSFETs
-
K.A. Jenkins, and K. Rim Measurement of the effect of self-heating in strained-silicon MOSFETs IEEE Electron Dev Lett 23 6 2002 360
-
(2002)
IEEE Electron Dev Lett
, vol.23
, Issue.6
, pp. 360
-
-
Jenkins, K.A.1
Rim, K.2
-
22
-
-
20344386558
-
Self-heating effects on strained Si/SiGe n-HFETs
-
M. Enciso, F. Aniel, L. Giguerre, T. Hackbarth, H. Herzog, and U. König Self-heating effects on strained Si/SiGe n-HFETs IEEE Semicond Dev Res Symp 2003 162 163
-
(2003)
IEEE Semicond Dev Res Symp
, pp. 162-163
-
-
Enciso, M.1
Aniel, F.2
Giguerre, L.3
Hackbarth, T.4
Herzog, H.5
König, U.6
-
24
-
-
0003426859
-
-
M.E. Levinshtein S.L. Rumyantsev M.S. Shur John Wiley & Sons, Inc. New York
-
F. Schaffler M.E. Levinshtein S.L. Rumyantsev M.S. Shur Properties of advanced semiconductor materials GaN, AlN, InN, BN, SiC, SiGe 2001 John Wiley & Sons, Inc. New York
-
(2001)
Properties of Advanced Semiconductor Materials GaN, AlN, InN, BN, SiC, SiGe
-
-
Schaffler, F.1
-
25
-
-
84906832331
-
The effect of self-heating on hot-carrier effects in deep submicron SOI/NMOS
-
Z. Xia, Y. Li, and Y. Zhao The effect of self-heating on hot-carrier effects in deep submicron SOI/NMOS IEEE Int Conf Microelectron 1 2000 221 223
-
(2000)
IEEE Int Conf Microelectron
, vol.1
, pp. 221-223
-
-
Xia, Z.1
Li, Y.2
Zhao, Y.3
-
26
-
-
84949197613
-
Excess hot-carrier currents in SOI MOSFETs and its implications
-
P. Su, K. Goto, T. Sugii, and C. Hu Excess hot-carrier currents in SOI MOSFETs and its implications IEEE Int Reliab Phys Symp 2002 93 97
-
(2002)
IEEE Int Reliab Phys Symp
, pp. 93-97
-
-
Su, P.1
Goto, K.2
Sugii, T.3
Hu, C.4
-
27
-
-
0022184756
-
Observation of electron velocity overshoot in sub-100-nm-channel MOSFET's in Silicon
-
S.Y. Chou, D.A. Antoniadis, and H.I. Smith Observation of electron velocity overshoot in sub-100-nm-channel MOSFET's in Silicon IEEE Electron Dev Lett 6 12 1985 665 667
-
(1985)
IEEE Electron Dev Lett
, vol.6
, Issue.12
, pp. 665-667
-
-
Chou, S.Y.1
Antoniadis, D.A.2
Smith, H.I.3
-
28
-
-
0023961304
-
Electron velocity overshoot at room and liquid nitrogen temperatures in silicon inversion layers
-
G.G. Shahidi, D.A. Antoniadis, and H.I. Smith Electron velocity overshoot at room and liquid nitrogen temperatures in silicon inversion layers IEEE Electron Dev Lett 9 2 1988 94 96
-
(1988)
IEEE Electron Dev Lett
, vol.9
, Issue.2
, pp. 94-96
-
-
Shahidi, G.G.1
Antoniadis, D.A.2
Smith, H.I.3
-
29
-
-
0017723739
-
Experimental observations of the chemistry of the silicon dioxide/silicon interface
-
F.J. Grunthaner, and J. Maserjian Experimental observations of the chemistry of the silicon dioxide/silicon interface IEEE Trans Nucl Sci NS-24 6 1977 2108 2112
-
(1977)
IEEE Trans Nucl Sci
, vol.NS-24
, Issue.6
, pp. 2108-2112
-
-
Grunthaner, F.J.1
Maserjian, J.2
-
30
-
-
0031645635
-
Ultra-thin 1.0-3.0 nm, gate oxides for high performance sub-100 nm technology
-
T. Sorsch, W. Timp, F.H. Baumann, K.H.A. Bogart, T. Boone, and V.M. Donnelly Ultra-thin 1.0-3.0 nm, gate oxides for high performance sub-100 nm technology IEEE VLSI Symp Tech Digest 1998 222 223
-
(1998)
IEEE VLSI Symp Tech Digest
, pp. 222-223
-
-
Sorsch, T.1
Timp, W.2
Baumann, F.H.3
Bogart, K.H.A.4
Boone, T.5
Donnelly, V.M.6
-
31
-
-
0001211314
-
2-Si interface on electrical characteristics of ultrathin gate oxides
-
2-Si interface on electrical characteristics of ultrathin gate oxides J Appl Phys 87 4 2000 1990 1995
-
(2000)
J Appl Phys
, vol.87
, Issue.4
, pp. 1990-1995
-
-
Eriguchi, K.1
Harada, Y.2
Niwa, M.3
-
35
-
-
0020751109
-
Interface trap generation in silicon dioxide when electrons are captured by tapped holes
-
S.K. Lai Interface trap generation in silicon dioxide when electrons are captured by tapped holes J Appl Phys 54 5 1983 2540 2546
-
(1983)
J Appl Phys
, vol.54
, Issue.5
, pp. 2540-2546
-
-
Lai, S.K.1
-
36
-
-
0026137499
-
A new aspect of mechanical stress effects in scaled MOS devices
-
A. Hamada, T. Furusawa, N. Saito, and E. Takeda A new aspect of mechanical stress effects in scaled MOS devices IEEE Trans Electron Dev 38 4 1991 895 900
-
(1991)
IEEE Trans Electron Dev
, vol.38
, Issue.4
, pp. 895-900
-
-
Hamada, A.1
Furusawa, T.2
Saito, N.3
Takeda, E.4
-
37
-
-
0028294836
-
Analysis of externally imposed mechanical stress effects on the hot-carrier-induced degradation of MOSFET's
-
R. Degraeve, I. De Wolf, G. Groeseneken, and H.E. Maes Analysis of externally imposed mechanical stress effects on the hot-carrier-induced degradation of MOSFET's IEEE Int Reliab Phys Symp 1994 29 33
-
(1994)
IEEE Int Reliab Phys Symp
, pp. 29-33
-
-
Degraeve, R.1
De Wolf, I.2
Groeseneken, G.3
Maes, H.E.4
-
38
-
-
33748538163
-
Hot-carrier degradation in novel strained-Si nMOSFETs
-
M.F. Liu, S. Chiang, A. Liu, S. Huang-Lu, M.S. Yeh, and J.R. Hwang Hot-carrier degradation in novel strained-Si nMOSFETs IEEE Int Reliab Phys Symp 2004 18
-
(2004)
IEEE Int Reliab Phys Symp
, pp. 18
-
-
Liu, M.F.1
Chiang, S.2
Liu, A.3
Huang-Lu, S.4
Yeh, M.S.5
Hwang, J.R.6
-
40
-
-
84864384696
-
1-x/Si strained-layer heterostructures
-
1-x/Si strained-layer heterostructures J Quant Electron QE-22 9 1986 1696
-
(1986)
J Quant Electron
, vol.QE-22
, Issue.9
, pp. 1696
-
-
People, R.1
-
41
-
-
0029490511
-
Temperature dependence of hot-carrier effects in short-channel Si-MOSFET's
-
N. Sano, M. Tomizawa, and A. Yoshii Temperature dependence of hot-carrier effects in short-channel Si-MOSFET's IEEE Trans Electron Dev 42 12 1995 2211 2216
-
(1995)
IEEE Trans Electron Dev
, vol.42
, Issue.12
, pp. 2211-2216
-
-
Sano, N.1
Tomizawa, M.2
Yoshii, A.3
-
42
-
-
33747647539
-
Channel structure design, fabrication and carrier transport properties of strained-Si/SiGe-on-insulator (strained-SOI) MOSFETs
-
Takagi S, Mizuno T, Tezuka T, Sugiyama N, Numata T, Usuda K, et al. Channel structure design, fabrication and carrier transport properties of strained-Si/SiGe-on-insulator (strained-SOI) MOSFETs. IEEE IEDM Tech Digest 2003;3-3.
-
(2003)
IEEE IEDM Tech Digest
, pp. 3-13
-
-
Takagi, S.1
Mizuno, T.2
Tezuka, T.3
Sugiyama, N.4
Numata, T.5
Usuda, K.6
-
43
-
-
0842309839
-
Fabrication and mobility characteristics of ultra-thin strained Si directly on insulator (SSDOI) MOSFETs
-
K. Rim, K. Chan, L. Shi, D. Boyd, J. Ott, and N. Klymko Fabrication and mobility characteristics of ultra-thin strained Si directly on insulator (SSDOI) MOSFETs IEEE IEDM Tech Digest 2003 3.1.1 3.1.4
-
(2003)
IEEE IEDM Tech Digest
, pp. 311-314
-
-
Rim, K.1
Chan, K.2
Shi, L.3
Boyd, D.4
Ott, J.5
Klymko, N.6
-
44
-
-
0842266599
-
Locally strained ultra-thin channel 25 nm narrow FDSOI devices with metal gate and mesa isolation
-
Z. Krivokapič, V. Moroz, W. Maszara, and M.-R. Lin Locally strained ultra-thin channel 25 nm narrow FDSOI devices with metal gate and mesa isolation IEEE IEDM Tech Digest 2003 18.5.1 18.5.4
-
(2003)
IEEE IEDM Tech Digest
, pp. 1851-1854
-
-
Krivokapič, Z.1
Moroz, V.2
Maszara, W.3
Lin, M.-R.4
-
45
-
-
3242671509
-
A 90 nm high volume manufacturing logic technology featuring novel 45 nm gate length strained silicon CMOS transistors
-
T. Ghani, M. Armstrong, C. Auth, M. Bost, P. Charvat, and G. Glass A 90 nm high volume manufacturing logic technology featuring novel 45 nm gate length strained silicon CMOS transistors IEEE IEDM Tech Digest 2003 11.6.1 11.6.3
-
(2003)
IEEE IEDM Tech Digest
, pp. 1161-1163
-
-
Ghani, T.1
Armstrong, M.2
Auth, C.3
Bost, M.4
Charvat, P.5
Glass, G.6
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