Improved hot-electron reliability in strained-Si nMOS

IEEE Transactions on Electron Devices

Volumn 51, Issue 12, 2004, Pages 2193-2199

  Onsongo, David ^a   Kelly, David Q ^b   Dey, Sagnik ^b   Wise, Rick L ^c   Cleavelin, C Rinn ^c   Banerjee, Sanjay K ^b  

^a IBM RESEARCH   (United States)

^b The University of Texas at Austin   (United States)

^c TEXAS INSTRUMENTS   (United States)

Author keywords

Hot carriers; MOSFETs; Semiconductor device reliability; Strained Si

Indexed keywords

CURRENT VOLTAGE CHARACTERISTICS; ELECTRIC BREAKDOWN; ELECTRON MOBILITY; HOT CARRIERS; RELIABILITY;

HOT ELECTRON DEGRADATION; SEMICONDUCTOR DEVICE RELIABILITY;

MOSFET DEVICES;

EID: 10644269483     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/TED.2004.839871     Document Type: Article

References (32)

1. J. L. Hoyt, H. M. Nayfeh, S. Eguchi, I. Aberg, G. Xia, T. Drake, E. A. Fitzgerald, and D. A. Antoniadis, "Strained silicon MOSFET technology," in IEDM Tech. Dig., 2002, pp. 23-26.
2. M. V. Fischetti and S. E. Laux, "Band structure, deformation potentials, and carrier mobility in stained Si, Ge and SiGe alloys," J. Appl. Phys., vol. 80, no. 4, pp. 2234-2252, 1996.
3. J. Welser, J. L. Hoyt, S. Takagi, and J. F. Gibbons, "Strain dependence of the performance enhancement in strained-Si n-MOSFETs," in IEDM Tech. Dig., 1994, pp. 373-376.
4. K. Rim, J. L. Hoyt, and J. F. Gibbons, "Transconductance enhancement in deep submicrometer strained-Si n-MOSFETs," in IEDM Tech. Dig., 1998, pp. 707-710.
5. T. Mizuno, N. Sugiyama, T. Tezuka, T. Numata, and S. Takagi, "High performance CMOS operation of strained-Soi MOSFETs unsing thin film SiGe-on-Insulator substrate," in Symp. VLSI Tech. Dig., 2002, pp. 106-107.
6. K. Rim, S. Koester, M. Hargrove, J. Chu, P. M. Mooney, J. Ott, T. Kanarsky, P. Ronsheim, M. Ieong, A. Grill, and H.-S. P. Wong, "Strained-Si nMOSFETs for high performance CMOS technology," in Symp. VLSI Tech. Dig., 2001, pp. 59-60.
7. K. Rim, J. Chu, K. A. Jenkins, T. Kanarshy, K. Lee, A. Mocuta, H. Zhu, R. Roy, J. Newbury, J. Ott, K. Petrarca, P. Mooney, D. Lacey, S. Koester, K. Chan, D. Boyd, M. Ieong, and H.-S. P. Wong, "Characteristics and device design of sub-100-nm strained- Si N- and PMOSFETs," in Symp. VLSI Tech. Dig., 2002, pp. 98-99.
8. 2 SRAM cell," in IEDM Tech. Dig., 2002, pp. 61-64.
9. M. S. Lundstrom, "On the mobility versus drain current relation for a nanoscale MOSFET," IEEE Electron Device Lett., vol. 22, pp. 293-295, Mar. 2001.
10. A. Lochtefeld and D. A. Antoniadis, "Investigating the relationship between electron mobility and velocity in deeply scaled nMOS via mechanical stress," IEEE Electron Device Lett., vol. 22, no. 12, pp. 591-593, Dec. 2001.
11. W. McMahon, A. Haggag, and K. Hess, "Reliability scaling issues for nanoscale devices," IEEE Trans. Nanotech., vol. 2, no. 1, pp. 33-38, 2003.
12. E. Li, E. Rosenbaum, J. Tao, and P. Fang, "Projecting lifetime of deep submicron MOSFETs," IEEE Trans. Electron Devices, vol. 48, pp. 671-678, May 2001.
13. A. Acovic, G. L. Rosa, and Y.-C. Sun, "A review of hot-carrier degradation mechanisms in MOSFETs," Microelectron. Reliabil., vol. 36, no. 7/8, pp. 845-869, 1996.
14. P. Heremans, R. Bellens, G. Groeseneken, and H. E. Maes, "Consistent model for the hot-carrier degradation in n-channel and p-channel MOSFETs," IEEE Trans. Electron Devices, vol. 35, pp. 2194-2209, Dec. 1988.
15. E. Takeda and N. Suzuki, "An empircal model for device degradation due to hot-carrier injection," IEEE Electron Device Lett., vol. EDL-4, pp. 111-113, Feb. 1983.
16. S. Tam, P.-K. Ko, and C. Hu, "Lucky-electron model of channel hot-electron injection in MOSFETs," IEEE Trans. Electron Devices, vol. 31, pp. 1116-1125, 1984.
17. C. Hu, "Lucky-Electron model of channel hot electron emission," in IEDM Tech. Dig., 1979, pp. 22-25.
18. K. Hasnat, C.-F. Yeap, S. Jallepalli, W.-K. Shih, S. A. Hareland, V. M. Agostinelli Jr, A. F. Tasch Jr, and C. M. Maziar, "A pseudo-lucky electron model for simulation of electron gate current in submicron nMOSFETs," IEEE Trans. Electron Devices, vol. 43, pp. 1264-1273, Oct. 1996.
19. G. G. Shahidi, D. A. Antoniadis, and H. I. Smith, "Electron velocity overshoot at room and liquid Nitrogen temperatures in silicon inversion layers," IEEE Electron Device Lett., vol. 9, pp. 94-96, Feb. 1988.
20. S. Y. Chou, D. A. Antoniadis, and H. I. Smith, "Observation of electon velocity overshoot in sub- 100-nm-channel MOSFETs in silicon," IEEE Electron Device Lett., vol. EDL-6, pp. 665-667, Dec. 1985.
21. [i#x substrates," Appl. Phy. Lett., vol. 63, no. 2, pp. 186-188, 1993.
22. K. Rim, "Application of silicon-based heterostructures to enhanced mobility metal-oxide-semiconductor field-effect transistors," Ph.D. dissertation, Stanford Univ., Stanford, CA, 1999.
23. J. Welser, "The application of strained-silicon/relaxed silicon-germanium heterostructures to metal-oxide-semiconductor field-effect transistors," Ph.D. dissertation, Stanford Univ., Stanford, CA, 1995.
24. S. K. Lai, "Interface trap generation in silicon dioxide when electrons are captured by tapped holes," J. Appl. Phy., vol. 54, no. 5, pp. 2540-2546, 1983.
25. 2 interface," IEEE Trans. Nucl. Sci., vol. NS-27, pp. 1640-1646, 1980.
26. 2 as determined with XPS," IEEE Trans. Nucl. Sci., vol. NS-29, pp. 1462-1466, 1982.
27. 2," Appl. Phys. Lett., vol. 46, no. 4, pp. 361-363, 1985.
28. 2-Si devices," Appl. Phys. Lett., vol. 45, no. 3, pp. 249-251, 1984.
29. K. Kasama, F. Toyokawa, M. Tsukiji, M. Sakamoto, and K. Kobayashi, "Mechanical stress dependence of radiation effects in MOS structures," IEEE Trans. Nucl. Sci., vol. NS-33, pp. 1210-1215, 1986.
30. V. Zekeriya and T-P. Ma, "Dependence of X-ray generation of interface traps on gate metal induced interfacial stress in MOS structures," IEEE Trans. Nucl. Sci., vol. NS-33, pp. 1261-1266, 1984.
31. A. Hamada, T. Furusawa. N. Saito. and E. Takeda. "A new aspect of mecahnical stress effects in scaled MOS devices," IEEE Trans. Electron Devices, vol. 38, pp. 895-900, Aug. 1991.
32. R. Degraeve, I. De Wolf, G. Groeseneken, and H. E. Maes, "Analysis of externally imposed mechanical stress effects on the hot-carrier-induced degradation of MOSFETs," Proc. IRPS, pp. 29-33, 1994.