Study of the effects of tunneling currents and reliability of sub-2 nm gate oxides on scaled n-MOSFETs

Microelectronics Reliability

Volumn 41, Issue 1, 2001, Pages 37-46

  Yang, Nian ^a   Wortman, Jimmie J ^b  

^a ADVANCED MICRO DEVICES   (United States)

^b North Carolina State University   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRIC BREAKDOWN OF SOLIDS; INTEGRATED CIRCUIT LAYOUT; INTEGRATED CIRCUIT TESTING; QUANTUM THEORY; SEMICONDUCTOR DEVICE MODELS; ULTRATHIN FILMS;

GATE TUNNELING CURRENTS; POINT-CONTACT MODELS;

MOSFET DEVICES;

EID: 0035147755     PISSN: 00262714     EISSN: None     Source Type: Journal    
DOI: 10.1016/S0026-2714(00)00099-8     Document Type: Article

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