Modeling study of ultrathin gate oxides using direct tunneling current and capacitance-voltage measurements in MOS devices

IEEE Transactions on Electron Devices

Volumn 46, Issue 7, 1999, Pages 1464-1471

  Yang, Nian ^b   Henson, W Kirklen ^b   Hauser, John R ^a,b   Wortman, Jimmie J ^a,b  

^a IEEE

^b North Carolina State University   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

INVERSION LAYERS;

CAPACITANCE MEASUREMENT; DIELECTRIC FILMS; ELECTRON TUNNELING; GATES (TRANSISTOR); LEAKAGE CURRENTS; SEMICONDUCTOR DEVICE MODELS; SEMICONDUCTOR DOPING; VOLTAGE MEASUREMENT;

MOSFET DEVICES;

EID: 0032662220     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/16.772492     Document Type: Article

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