Prospects for low-power, high-speed MPUs using 1.5nm direct-tunneling gate oxide MOSFETs

Solid-State Electronics

Volumn 41, Issue 5, 1997, Pages 707-714

  Momose, Hisayo Sasaki ^a   Ono, Mizuki ^a   Yoshitomi, Takashi ^a   Ohguro, Tatsuya ^a   Nakamura, Shin Ichi ^a   Saito, Masanobu ^a   Iwai, Hiroshi ^a  

^a TOSHIBA CORPORATION   (Japan)

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRON TUNNELING; GATES (TRANSISTOR); MOSFET DEVICES; NATURAL FREQUENCIES; SEMICONDUCTOR DEVICE MANUFACTURE;

DIRECT TUNNELING GATE OXIDE MOSFET;

MICROPROCESSOR CHIPS;

EID: 0031140973     PISSN: 00381101     EISSN: None     Source Type: Journal    
DOI: 10.1016/S0038-1101(96)00257-2     Document Type: Article

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