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Volumn 108, Issue 8, 2016, Pages

2D-2D tunneling field-effect transistors using WSe2/SnSe2 heterostructures

Author keywords

[No Author keywords available]

Indexed keywords

DRAIN CURRENT; ELECTRON TUNNELING; ENERGY EFFICIENCY; GATE DIELECTRICS; HETEROJUNCTIONS; RECONFIGURABLE HARDWARE; VAN DER WAALS FORCES;

EID: 84959228986     PISSN: 00036951     EISSN: None     Source Type: Journal    
DOI: 10.1063/1.4942647     Document Type: Article
Times cited : (291)

References (28)
  • 4
    • 84959215616 scopus 로고    scopus 로고
    • in 2009 Symposium on VLSI Technology (IEEE)
    • K. S. Hwan, K. Hei, C. Hu, and T. J. K. Liu, in 2009 Symposium on VLSI Technology (IEEE, 2009), p. 178.
    • (2009) , pp. 178
    • Hwan, K.S.1    Hei, K.2    Hu, C.3    Liu, T.J.K.4
  • 10
    • 84866559006 scopus 로고    scopus 로고
    • in 2012 Symposium on VLSI Technology
    • K. Tomioka, M. Yoshimura, and T. Fukui, in 2012 Symposium on VLSI Technology (2012), p. 47.
    • (2012) , pp. 47
    • Tomioka, K.1    Yoshimura, M.2    Fukui, T.3
  • 22
    • 84959212522 scopus 로고    scopus 로고
    • 2 gate.
    • 2 gate.


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.