7nm FinFET standard cell layout characterization and power density prediction in near- and super-threshold voltage regimes

2014 International Green Computing Conference, IGCC 2014

Volumn , Issue , 2015, Pages

  Cui, Tiansong ^a   Xie, Qing ^a   Wang, Yanzhi ^a   Nazarian, Shahin ^a   Pedram, Massoud ^a  

^a UNIVERSITY OF SOUTHERN CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CELLS; CMOS INTEGRATED CIRCUITS; COMPUTATION THEORY; COMPUTER CIRCUITS; CYTOLOGY; FINFET; GREEN COMPUTING; INTEGRATED CIRCUIT LAYOUT; LOGIC DEVICES; SPICE; THERMAL MANAGEMENT (ELECTRONICS);

CMOS TECHNOLOGY; FINFET DEVICES; NEAR THRESHOLDS; POWER DENSITIES; PULL DOWN NETWORKS; STATE OF THE ART; TECHNOLOGY NODES; THRESHOLD OPERATION;

THRESHOLD VOLTAGE;

EID: 84924371245     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IGCC.2014.7039170     Document Type: Conference Paper

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