-
1
-
-
0035054909
-
Physical Design of a Fourth Generation POWER GHz Microprocessor
-
February
-
C.J. Anderson et al, "Physical Design of a Fourth Generation POWER GHz Microprocessor," ISSCC Digest of Technical Papers, pp. 232-233, February 2001.
-
(2001)
ISSCC Digest of Technical Papers
, pp. 232-233
-
-
Anderson, C.J.1
-
2
-
-
28144436750
-
Ambient intelligence; gigascale dreams and nanoscale realities
-
February
-
H. De Man, "Ambient intelligence; gigascale dreams and nanoscale realities," ISSCC Digest of Technical Papers, pp. 29-35, February 2005.
-
(2005)
ISSCC Digest of Technical Papers
, pp. 29-35
-
-
De Man, H.1
-
3
-
-
0035060744
-
FinFET-a quasi-planar double-gate MOSFET
-
February
-
S.H. Tang et al, "FinFET-a quasi-planar double-gate MOSFET," ISSCC Digest of Technical Papers, pp. 118-119, February 2001.
-
(2001)
ISSCC Digest of Technical Papers
, pp. 118-119
-
-
Tang, S.H.1
-
4
-
-
33744741284
-
Advanced FinFET Technology: TiN Metal-gate CMOS and 3T/4T Device Integration
-
October
-
Y. X. Liu et al, "Advanced FinFET Technology: TiN Metal-gate CMOS and 3T/4T Device Integration", International SOI Conference, pp. 217-220, October 2005.
-
(2005)
International SOI Conference
, pp. 217-220
-
-
Liu, Y.X.1
-
8
-
-
33748987198
-
Ultra-thin (EOT=3A) and law leakage dielectrics of La-alminate directly on Si substrate fabricated by high temperature deposition
-
M. Suzuki, "Ultra-thin (EOT=3A) and law leakage dielectrics of La-alminate directly on Si substrate fabricated by high temperature deposition", International Electron Devices Meeting, pp., Dec. 2005.
-
(2005)
International Electron Devices Meeting, pp., Dec
-
-
Suzuki, M.1
-
9
-
-
33646900503
-
Device Scaling Limits of Si MOSFETs and Their Application Dependencies
-
March
-
D. J. Frank et al. "Device Scaling Limits of Si MOSFETs and Their Application Dependencies", IEEE Proceedings, Vol. 89, No. 3, pp. 259-288, March 2001.
-
(2001)
IEEE Proceedings
, vol.89
, Issue.3
, pp. 259-288
-
-
Frank, D.J.1
-
11
-
-
4544347719
-
Low power SRAM menu for SOC application using Yin-Yang-feedback memory cell technology
-
M. Yamaoka, "Low power SRAM menu for SOC application using Yin-Yang-feedback memory cell technology", Symposium on VLSI Circuits, pp. 288-291, 2004.
-
(2004)
Symposium on VLSI Circuits
, pp. 288-291
-
-
Yamaoka, M.1
-
12
-
-
0023437909
-
Static-Noise Margin Analysis of MOS SRAM Cells
-
pps, Oct
-
E. Seevinck et al, "Static-Noise Margin Analysis of MOS SRAM Cells," JSSC, Vol. SC-22, No. 5, pps 748-754, Oct. 1987.
-
(1987)
JSSC
, vol.SC-22
, Issue.5
, pp. 748-754
-
-
Seevinck, E.1
-
13
-
-
0036458455
-
A comparative study of threshold variations in symmetric and asymmetric undoped double-gate MOSFETs
-
Q. Chen, and J.D. Meindl, "A comparative study of threshold variations in symmetric and asymmetric undoped double-gate MOSFETs," in 2002 IEEE International SOI Conference, pp. 30-31.
-
2002 IEEE International SOI Conference
, pp. 30-31
-
-
Chen, Q.1
Meindl, J.D.2
-
14
-
-
33748563957
-
Implementing Caches in a 3D Technology for High Performance Processors
-
October
-
K. Puttaswamy, "Implementing Caches in a 3D Technology for High Performance Processors", International Conference on Computer Design, pp. 525-532, October 2005.
-
(2005)
International Conference on Computer Design
, pp. 525-532
-
-
Puttaswamy, K.1
-
15
-
-
34548137455
-
Chip-level Performance Maximization using ASIS (Application-specific Interconnect Structure) Wiring Design Concept for 45 nm CMOS Devices
-
December
-
N. Oda et al. "Chip-level Performance Maximization using ASIS (Application-specific Interconnect Structure) Wiring Design Concept for 45 nm CMOS Devices", International Electron Devices Meeting, December 2005.
-
(2005)
International Electron Devices Meeting
-
-
Oda, N.1
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