Energy-efficient reconfigurable cache architectures for accelerator-enabled embedded systems

ISPASS 2014 - IEEE International Symposium on Performance Analysis of Systems and Software

Volumn , Issue , 2014, Pages 211-220

  Farmahini Farahani, Amin ^a   Kim, Nam Sung ^a   Morrow, Katherine ^a  

^a University of Wisconsin Madison   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

ACCELERATION; CACHE MEMORY; EMBEDDED SYSTEMS; ENERGY UTILIZATION;

CACHE ARCHITECTURE; CACHE HIERARCHIES; CONFIGURABLE CACHE; DATA CACHE DESIGNS; DATA-COMMUNICATION; EMBEDDED PROCESSORS; ENERGY EFFICIENT; SOFTWARE/HARDWARE;

ENERGY EFFICIENCY;

EID: 84904470871     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ISPASS.2014.6844485     Document Type: Conference Paper

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