A scalable memory interface for multicore reconfigurable computing systems

2011 International Conference on Field-Programmable Technology, FPT 2011

Volumn , Issue , 2011, Pages

  Garcia, Philip ^a   Compton, Katherine ^a  

^a UNIVERSITY OF WISCONSIN MADISON   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

APPLICATION PERFORMANCE; CO-PROCESSORS; DEDICATED HARDWARE; DESIGN TIME; GENERAL PURPOSE PROCESSORS; MEMORY SUBSYSTEMS; MINIMAL POWER; MULTI CORE; MULTI-PURPOSE; MULTICORE DEVICES; MULTIPLE APPLICATIONS; MULTIPLE PROCESSORS; POTENTIAL SOLUTIONS; RECONFIGURABLE COMPUTING SYSTEMS; RECONFIGURABLE FABRICS; SCALABLE MEMORY;

EMBEDDED SYSTEMS;

COMPUTER HARDWARE;

EID: 84857211629     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/FPT.2011.6132685     Document Type: Conference Paper

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