Reconfigurable caches and their application to media processing

Conference Proceedings - Annual International Symposium on Computer Architecture, ISCA

Volumn , Issue , 2000, Pages 214-224

  Ranganathan, Parthasarathy ^a   Adve, Sarita ^a   Jouppi, Norman P ^a  

^a RICE UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

COMPUTER ARCHITECTURE; COMPUTER SIMULATION; COMPUTER SYSTEMS PROGRAMMING; MATHEMATICAL MODELS; MICROPROCESSOR CHIPS; RANDOM ACCESS STORAGE; RESPONSE TIME (COMPUTER SYSTEMS); STORAGE ALLOCATION (COMPUTER);

MEDIA PROCESSING;

BUFFER STORAGE;

EID: 0033723131     PISSN: 08847495     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/339647.339685     Document Type: Conference Paper

References (25)