On high-bandwidth data cache design for multi-issue processors

Proceedings of the Annual International Symposium on Microarchitecture

Volumn , Issue , 1997, Pages 46-56

  Rivers, Jude A ^a   Tyson, Gary S ^a   Davidson, Edward S ^a   Austin, Todd M ^a  

^a UNIVERSITY OF MICHIGAN   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BANDWIDTH; COMPUTER SYSTEMS PROGRAMMING; DATA ACQUISITION; MULTIPROCESSING SYSTEMS; PROGRAM PROCESSORS;

LOCALITY BASED INTERLEAVED CACHE (LBIC); MULTIISSUE PROCESSORS;

BUFFER STORAGE;

EID: 0031374421     PISSN: 10724451     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (22)