A highly configurable cache architecture for embedded systems

Conference Proceedings - Annual International Symposium on Computer Architecture, ISCA

Volumn , Issue , 2003, Pages 136-146

  Zhang, Chuanjun ^a   Vahid, Frank ^a,b   Najjar, Walid ^a  

^a University of California Riverside   (United States)

^b UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

Architecture tuning; Cache; Configurable; Embedded systems; Low energy; Low power; Microprocessor

Indexed keywords

ASSOCIATIVE STORAGE; CACHE MEMORY; COMPUTER ARCHITECTURE; EMBEDDED SYSTEMS;

CACHE ARCHITECTURE; CONFIGURABLE ARCHITECTURE TUNING;

MICROPROCESSOR CHIPS;

EID: 0038684781     PISSN: 08847495     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/859634.859635     Document Type: Conference Paper

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