Multi-application network-on-chip design using global mapping and local reconfiguration

ACM Transactions on Reconfigurable Technology and Systems

Volumn 7, Issue 2, 2014, Pages

  Soumya, J ^a   Sharma, Ashish ^a   Chattopadhyay, Santanu ^a  

^a INDIAN INSTITUTE OF TECHNOLOGY   (India)

Author keywords

Combined core graph; Integer linear programming; Particle swarm optimization; Reconfiguration

Indexed keywords

COMMUNICATION; HEURISTIC METHODS; INTEGER PROGRAMMING; NETWORK ARCHITECTURE; PARTICLE SWARM OPTIMIZATION (PSO); RECONFIGURABLE ARCHITECTURES; ROUTERS; VLSI CIRCUITS;

COMMUNICATION COST; CORE GRAPH; HEURISTIC APPROACH; INTEGER LINEAR PROGRAMMING; LOCAL RECONFIGURATIONS; NETWORK-ON-CHIP ARCHITECTURES; NETWORK-ON-CHIP DESIGN; RECONFIGURATION;

NETWORK-ON-CHIP;

EID: 84903844893     PISSN: 19367406     EISSN: 19367414     Source Type: Journal    
DOI: 10.1145/2556944     Document Type: Article

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