Multi-application mapping algorithm for network-on-chip platforms

2010 IEEE 26th Convention of Electrical and Electronics Engineers in Israel, IEEEI 2010

Volumn , Issue , 2010, Pages 540-544

  Yang, Bo ^a,c   Guang, Liang ^a,c   Xu, Thomas Canhao ^a,c   Sfultti, Tero ^a,b   Plosila, Juha ^a,b  

^a UNIVERSITY OF TURKU   (Finland)

^b ACADEMY OF FINLAND   (Finland)

^c TURKU CENTRE FOR COMPUTER SCIENCE   (Finland)

Author keywords

[No Author keywords available]

Indexed keywords

COMMUNICATION DISTANCE; COMPUTING PLATFORM; ENERGY CONSUMPTION; MANY-CORE; MANY-CORE ARCHITECTURE; MULTI-APPLICATION; MULTIPLE APPLICATIONS; NETWORK DELAYS; NETWORK LATENCIES; NETWORK ON CHIP; PROCESSING RESOURCES; RANDOM MAPPINGS; SYSTEMS-ON-CHIP;

CONFORMAL MAPPING; ENERGY UTILIZATION; ENGINEERS; PROGRAMMABLE LOGIC CONTROLLERS; SERVERS; VLSI CIRCUITS;

ALGORITHMS;

EID: 78651243354     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/EEEI.2010.5662160     Document Type: Conference Paper

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