Route packets, not wires: On-chip interconnection networks

Proceedings - Design Automation Conference

Volumn , Issue , 2001, Pages 684-689

  Dally, W J ^a   Towles, B ^a  

^a STANFORD UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BANDWIDTH; MICROPROCESSOR CHIPS; PACKET NETWORKS; PROGRAM PROCESSORS; SEMICONDUCTOR STORAGE;

NETWORK STRUCTURES;

INTERCONNECTION NETWORKS;

EID: 0034848112     PISSN: 0738100X     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (8)

1. Virtual channel flow control
2. Elastic interconnects: Repeater-inserted long wiring capable of compressing and decompressing data
3. A delay model and speculative architecture for pipelined routers
4. Let's route packets instead of wires