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Volumn 2006, Issue , 2006, Pages 405-411
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Architecture of a dynamically reconfigurable NoC for adaptive reconfigurable MPSoC
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Author keywords
[No Author keywords available]
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Indexed keywords
COMPUTER ARCHITECTURE;
COMPUTER SIMULATION;
MULTIPROCESSING SYSTEMS;
QUALITY OF SERVICE;
TELECOMMUNICATION NETWORKS;
COMMUNICATION REQUIREMENTS;
MULTIPROCESSOR SYSTEM ON CHIP (MPSOC);
NETWORK ON CHIP (NOC);
TRAFFIC CONDITION;
MICROPROCESSOR CHIPS;
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EID: 33845569484
PISSN: None
EISSN: None
Source Type: Conference Proceeding
DOI: 10.1109/AHS.2006.25 Document Type: Conference Paper |
Times cited : (51)
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References (12)
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