Configuring algorithm for reconfigurable Network-on-Chip architecture

2012 2nd International Conference on Consumer Electronics, Communications and Networks, CECNet 2012 - Proceedings

Volumn , Issue , 2012, Pages 222-225

  Ding, Hui ^a,b   Gu, Huaxi ^a,b   Li, Bin ^c   Du, Keming ^c  

^a XIDIAN UNIVERSITY   (China)

^b Sci and Technol on Information Transmission and Dissemination in Communication Networks Laboratory   (China)

^c The 54th Institute of CETC   (China)

Author keywords

design; mapping; NoC; reconfigurable; topology generation

Indexed keywords

COMMUNICATION RELATIONSHIPS; CYCLE-ACCURATE SIMULATORS; DESIGN COMPLEXITY; MAPPING SCHEME; NETWORK ON CHIP; NETWORK-ON-CHIP ARCHITECTURES; NOC; NOC ARCHITECTURES; NOC DESIGN; RECONFIGURABLE; SINGLE CHIPS; TOPOLOGY-GENERATION;

ALGORITHMS; COMPUTER SIMULATION; CONSUMER ELECTRONICS; DESIGN; MAPPING; OPTIMIZATION; RECONFIGURABLE ARCHITECTURES; ROUTERS; TOPOLOGY; VLSI CIRCUITS;

NETWORK ARCHITECTURE;

EID: 84861904963     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/CECNet.2012.6201598     Document Type: Conference Paper

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