Nanoscale and device level gate conduction variability of high-k dielectrics-based metal-oxide-semiconductor structures

IEEE Transactions on Device and Materials Reliability

Volumn 11, Issue 3, 2011, Pages 495-501

  Bayerl, Albin ^a   Lanza, Mario ^a   Porti, Marc ^a   Nafria, Montserrat ^a   Aymerich, Xavier ^a   Campabadal, F ^b   Benstetter, Gnther ^c  

^a UNIVERSITAT AUTÒNOMA DE BARCELONA   (Spain)

^b INSTITUTO DE MICROELECTRÓNICA DE BARCELONA   (Spain)

^c DEGGENDORF INSTITUTE OF TECHNOLOGY   (Germany)

Author keywords

Atomic force microscopy (AFM); high k crystallization; high k dielectric; MOS devices; variability

Indexed keywords

A-THERMAL; CONDUCTIVE ATOMIC FORCE MICROSCOPES; ELECTRICAL CHARACTERISTIC; GATE STACKS; HIGH-K CRYSTALLIZATION; HIGH-K DIELECTRIC; KELVIN PROBE FORCE MICROSCOPES; METAL OXIDE SEMICONDUCTOR; METAL OXIDE SEMICONDUCTOR STRUCTURES; NANO SCALE; NANOSCALE PROPERTIES; POLYCRYSTALLINE MICROSTRUCTURE; POTENTIAL SOURCES; VARIABILITY;

ATOMIC FORCE MICROSCOPY; CRYSTALLIZATION; DIELECTRIC DEVICES; DIELECTRIC MATERIALS; ELECTRIC PROPERTIES; GATE DIELECTRICS; LOGIC GATES; NANOSTRUCTURED MATERIALS; NANOTECHNOLOGY;

MOS DEVICES;

EID: 80052610994     PISSN: 15304388     EISSN: 15582574     Source Type: Journal    
DOI: 10.1109/TDMR.2011.2161087     Document Type: Article

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