Review of reliability issues in high-k/metal gate stacks

Proceedings of the International Symposium on the Physical and Failure Analysis of Integrated Circuits, IPFA

Volumn , Issue , 2008, Pages

  Degraeve, R ^a   Aoulaiche, M ^c   Kaczer, B ^c   Roussel, Ph ^c   Kauerauf, T ^c   Sahhaf, S ^c   Groeseneken, G ^b  

^a IMEC   (Belgium)

^b UNIVERSITY OF LEUVEN   (Belgium)

^c NONE

Author keywords

[No Author keywords available]

Indexed keywords

ELECTRIC NETWORK ANALYSIS; ELECTRONICS INDUSTRY; FAILURE ANALYSIS; INTEGRATED CIRCUITS; LOGIC GATES; MODELS; QUALITY ASSURANCE; RESEARCH; SAFETY FACTOR; SILICON COMPOUNDS; SULFATE MINERALS; TECHNICAL PRESENTATIONS;

CHARACTERIZATION TECHNIQUES; DEGRADATION MODELING; GATE STACKS; HIGH-K GATE STACKS; INTERNATIONAL SYMPOSIUM;

RELIABILITY;

EID: 52149109905     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/IPFA.2008.4588195     Document Type: Conference Paper

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