A direct coherence protocol for many-core chip multiprocessors

IEEE Transactions on Parallel and Distributed Systems

Volumn 21, Issue 12, 2010, Pages 1779-1792

  Ros, Alberto ^a   Acacio, Manuel E ^a   García, Jośe M ^a  

^a UNIVERSITY OF MURCIA   (Spain)

Author keywords

cache coherence protocol; direct coherence; indirection problem; Many core CMP; on chip network traffic

Indexed keywords

CACHE COHERENCE PROTOCOLS; DIRECT COHERENCE; INDIRECTION PROBLEM; MANY-CORE; ON-CHIP NETWORKS;

INTERCONNECTION NETWORKS; MULTIPROCESSING SYSTEMS; NETWORK PROTOCOLS;

NETWORK ARCHITECTURE;

EID: 78149285497     PISSN: 10459219     EISSN: None     Source Type: Journal    
DOI: 10.1109/TPDS.2010.43     Document Type: Article

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