Efficient thermal via planning approach and its application in 3-D floorplanning

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Volumn 26, Issue 4, 2007, Pages 645-658

  Li, Zhuoyuan ^b   Hong, Xianlong ^a,b   Zhou, Qiang ^b   Zeng, Shan ^b   Bian, Jinian ^b   Yu, Wenjian ^a,b   Yang, Hannah H ^c   Pitchumani, Vijay ^c   Cheng, Chung Kuan ^d  

^a IEEE   (China)

^b TSINGHUA UNIVERSITY   (China)

^c INTEL CORPORATION   (United States)

^d UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

Floorplanning; Optimization; Thermal; Very large scale integration (VLSI)

Indexed keywords

CONVEX PROGRAMMING PROBLEM; FLOORPLANNING; SPACE REDISTRIBUTION;

ALGORITHMS; COMPUTATIONAL COMPLEXITY; COMPUTER AIDED DESIGN; INTEGRATED CIRCUIT LAYOUT; OPTIMIZATION; VLSI CIRCUITS;

PROBLEM SOLVING;

EID: 33947592223     PISSN: 02780070     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCAD.2006.885831     Document Type: Article

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