How to safely apply the LVTSCR for CMOS whole-chip ESD protection without being accidentally triggered on

Journal of Electrostatics

Volumn 47, Issue 4, 1999, Pages 215-248

  Ker, Ming Dou ^a   Chang, Hun Hsien ^b  

^a INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE   (Taiwan)

^b TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY   (Taiwan)

Author keywords

Cascode; CMOS; Electrostatic discharge protection; Latch up; LVTSCR; Stacked SCRs

Indexed keywords

CMOS INTEGRATED CIRCUITS; ELECTRIC DISCHARGES; ELECTRIC EQUIPMENT PROTECTION; ELECTRIC NETWORK SYNTHESIS; ELECTROSTATICS;

ELECTROSTATIC DISCHARGE PROTECTION; NOISE PULSES; SYSTEM-LEVEL OVERSHOOTING;

THYRISTORS;

EID: 0032597591     PISSN: 03043886     EISSN: None     Source Type: Journal    
DOI: 10.1016/S0304-3886(99)00037-6     Document Type: Article

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