Two unusual HBM ESD failure mechanisms on a mature CMOS process

Electrical Overstress/Electrostatic Discharge Symposium Proceedings

Volumn , Issue , 1993, Pages 225-231

  Johnson, Charlene C ^a   Maloney, Timothy J ^a   Qawani, Shekoufeh ^a  

^a INTEL CORPORATION   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

BUFFER CIRCUITS; BUSBARS; CIRCUIT THEORY; ELECTRIC DISCHARGES; ELECTRIC EQUIPMENT PROTECTION; ELECTRIC FAULT CURRENTS; FAILURE ANALYSIS; GATES (TRANSISTOR); HUMAN FORM MODELS;

CMOS PROCESS; ELECTROSTATICS DISCHARGE FAILURE; HBM ESD FAILURE MECHANISMS; PAD PROTECTION STRATEGIES;

CMOS INTEGRATED CIRCUITS;

EID: 0027882751     PISSN: 07395159     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (7)