Gate engineering for deep-submicron CMOS transistors

IEEE Transactions on Electron Devices

Volumn 45, Issue 6, 1998, Pages 1253-1262

  Yu, Bin ^a,b   Ju, Dong Hyuk ^a   Lee, Wen Chin ^a   Kepler, Nick ^a   King, Tsu Jae ^a   Hu, Chenming ^a  

^a ADVANCED MICRO DEVICES   (United States)

^b UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

Amorphous semiconductor; Boron penetration; Gate engineering; Gate depletion effect; Mosfet's, semiconductor devices; Sige; Very large scale integration

Indexed keywords

AMORPHOUS MATERIALS; ANNEALING; CMOS INTEGRATED CIRCUITS; CURRENT VOLTAGE CHARACTERISTICS; GATES (TRANSISTOR); ION IMPLANTATION; MICROELECTRONICS; NITROGEN; SEMICONDUCTING BORON; SEMICONDUCTING SILICON COMPOUNDS; SEMICONDUCTOR DOPING; VLSI CIRCUITS;

GATE ENGINEERING;

MOSFET DEVICES;

EID: 0032096839     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/16.678529     Document Type: Article

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