ATLAS: A scalable and high-performance scheduling algorithm for multiple memory controllers

Proceedings - International Symposium on High-Performance Computer Architecture

Volumn , Issue , 2010, Pages

  Kim, Yoongu ^a   Han, Dongsu ^a   Mutlu, Onur ^a   Harchol Balter, Mor ^a  

^a CARNEGIE MELLON UNIVERSITY   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

CHIP MULTIPROCESSORS; CONTROL ACCESS; CORE SYSTEMS; EFFICIENT SCHEDULING; HAZARD RATES; MAIN MEMORY; MEMORY CONTROLLER; MEMORY SCHEDULING; PERFORMANCE BENEFITS; PRIORITIZATION; SINGLE SERVER QUEUE; SYSTEM THROUGHPUT; WORK-LOAD DISTRIBUTION;

ACCESS CONTROL; ADAPTIVE CONTROL SYSTEMS; COMPUTER ARCHITECTURE; COMPUTERS; CONTROLLERS; GAME THEORY; MULTIPROGRAMMING; QUEUEING THEORY; THROUGHPUT;

SCHEDULING ALGORITHMS;

EID: 77952558442     PISSN: 15300897     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

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