메뉴 건너뛰기




Volumn , Issue , 2005, Pages 1-261

All-Digital Frequency Synthesizer in Deep-Submicron CMOS

Author keywords

[No Author keywords available]

Indexed keywords


EID: 84889447760     PISSN: None     EISSN: None     Source Type: Book    
DOI: 10.1002/0470041951     Document Type: Book
Times cited : (218)

References (91)
  • 1
    • 29044438054 scopus 로고    scopus 로고
    • Digital deep-submicron CMOS frequency synthesis for RF wireless applications
    • Ph.D. dissertation, University of Texas at Dallas, Aug
    • R. B. Staszewski, Digital deep-submicron CMOS frequency synthesis for RF wireless applications, Ph.D. dissertation, University of Texas at Dallas, Aug. 2002.
    • (2002)
    • Staszewski, R.B.1
  • 2
    • 84889392521 scopus 로고    scopus 로고
    • Top-down simulation methodology of a 500 MHz mixed-signal magnetic recording read channel using standard VHDL
    • Proceedings of the Behavioral Modeling and Simulation Conference, sec. 3.2, Oct
    • R. B. Staszewski and S. Kiriaki, Top-down simulation methodology of a 500 MHz mixed-signal magnetic recording read channel using standard VHDL, Proceedings of the Behavioral Modeling and Simulation Conference, sec. 3.2, Oct. 1999.
    • (1999)
    • Staszewski, R.B.1    Kiriaki, S.2
  • 3
  • 4
    • 0004200915 scopus 로고    scopus 로고
    • RF Microelectronics
    • Prentice Hall, Upper Saddle River, NJ
    • B. Razavi, RF Microelectronics, Prentice Hall, Upper Saddle River, NJ, 1998.
    • (1998)
    • Razavi, B.1
  • 5
    • 0003761737 scopus 로고    scopus 로고
    • Wireless CMOS Frequency Synthesizer Design
    • Kluwer Academic, Norwell, MA
    • J. Craninckx and M. Steyaert, Wireless CMOS Frequency Synthesizer Design, Kluwer Academic, Norwell, MA, 1998.
    • (1998)
    • Craninckx, J.1    Steyaert, M.2
  • 6
    • 0003464062 scopus 로고    scopus 로고
    • The Design of CMOS Radio-Frequency Integrated Circuits
    • Cambridge University Press, Cambridge
    • T. H. Lee, The Design of CMOS Radio-Frequency Integrated Circuits, Cambridge University Press, Cambridge, 1998.
    • (1998)
    • Lee, T.H.1
  • 8
    • 0022882296 scopus 로고
    • A short survey of frequency synthesizer techniques
    • Proceedings of the 40th Annual Frequency Control Symposium, May
    • V. Reinhardt, K. Gould, K. McNab, and M. Bustamante, A short survey of frequency synthesizer techniques, Proceedings of the 40th Annual Frequency Control Symposium, pp. 355-365, May 1986.
    • (1986) , pp. 355-365
    • Reinhardt, V.1    Gould, K.2    McNab, K.3    Bustamante, M.4
  • 10
    • 0029267943 scopus 로고
    • A 200 MHz quadrature digital synthesizer/mixer in 0.8 mm CMOS
    • Mar
    • L. K. Tan and H. Samueli, A 200 MHz quadrature digital synthesizer/mixer in 0.8 mm CMOS, IEEE Journal of Solid-State Circuits, vol. 30, no. 3, pp. 193-200, Mar. 1995.
    • (1995) IEEE Journal of Solid-State Circuits , vol.30 , Issue.3 , pp. 193-200
    • Tan, L.K.1    Samueli, H.2
  • 11
    • 0004121923 scopus 로고    scopus 로고
    • Frequency Synthesis by Phase Lock
    • Wiley, New York
    • W. F. Egan, Frequency Synthesis by Phase Lock, Wiley, New York, 2000.
    • (2000)
    • Egan, W.F.1
  • 12
    • 0004116158 scopus 로고    scopus 로고
    • Phase Lock Basics
    • Wiley, New York
    • W. F. Egan, Phase Lock Basics, Wiley, New York, 1998.
    • (1998)
    • Egan, W.F.1
  • 14
    • 0348152081 scopus 로고    scopus 로고
    • A low power monolithic subsampled phase-locked loop architecture for wireless transceivers
    • May-June
    • A. N. Hafez and M. I. Elmasry, A low power monolithic subsampled phase-locked loop architecture for wireless transceivers, Proceedings of the IEEE Symposium on Circuits and Systems, vol. 2, pp. 549-552, May-June 1999.
    • (1999) Proceedings of the IEEE Symposium on Circuits and Systems , vol.2 , pp. 549-552
    • Hafez, A.N.1    Elmasry, M.I.2
  • 15
    • 0030689958 scopus 로고    scopus 로고
    • Challenges in the design of frequency synthesizers for wireless applications
    • Proceedings of the Custom Integrated Circuits Conference
    • B. Razavi, Challenges in the design of frequency synthesizers for wireless applications, Proceedings of the Custom Integrated Circuits Conference, pp. 395-402, 1997.
    • (1997) , pp. 395-402
    • Razavi, B.1
  • 16
    • 0034999120 scopus 로고    scopus 로고
    • Challenges in integrated CMOS transceivers for short distance wireless
    • Proceedings of the Great Lakes Symposium on VLSI, Mar
    • K. Muhammad, R. B. Staszewski, and P. T. Balsara, Challenges in integrated CMOS transceivers for short distance wireless, Proceedings of the Great Lakes Symposium on VLSI, Mar. 2001.
    • (2001)
    • Muhammad, K.1    Staszewski, R.B.2    Balsara, P.T.3
  • 17
    • 84889422008 scopus 로고    scopus 로고
    • Robust receiver design using digitally intensive techniques to overcome analog impairments
    • Ph.D. dissertation, Department of Electrical Engineering, University of Texas at Dallas, Nov
    • I. Elahi, Robust receiver design using digitally intensive techniques to overcome analog impairments, Ph.D. dissertation, Department of Electrical Engineering, University of Texas at Dallas, Nov. 2005.
    • (2005)
    • Elahi, I.1
  • 18
    • 0003847709 scopus 로고    scopus 로고
    • Wireless Communications: Principles and Practice
    • Prentice Hall, Upper Saddle River, NJ
    • T. S. Rappaport, Wireless Communications: Principles and Practice, Prentice Hall, Upper Saddle River, NJ, 1996.
    • (1996)
    • Rappaport, T.S.1
  • 19
    • 0003768842 scopus 로고    scopus 로고
    • A DECT transceiver chip set using SiGe technology
    • Proceedings of the IEEE Solid-State Circuits Conference, sec. MP4.2, 447, Feb
    • M. Bopp et al., A DECT transceiver chip set using SiGe technology, Proceedings of the IEEE Solid-State Circuits Conference, sec. MP4.2, pp. 68-69, 447, Feb. 1999.
    • (1999) , pp. 68-69
    • Bopp, M.1
  • 20
    • 0032672201 scopus 로고    scopus 로고
    • Feed-forward compensated high switching speed digital phaselocked loop frequency synthesizer
    • Proceedings of the IEEE Symposium on Circuits and Systems
    • B. Zhang and P. Allen, Feed-forward compensated high switching speed digital phaselocked loop frequency synthesizer, Proceedings of the IEEE Symposium on Circuits and Systems, vol. 4, pp. 371-374, 1999.
    • (1999) , vol.4 , pp. 371-374
    • Zhang, B.1    Allen, P.2
  • 21
  • 22
    • 0003510261 scopus 로고
    • Phase-Locked Loop Circuit Design
    • Prentice Hall, Englewood Cliffs, NJ
    • D. H. Wolaver, Phase-Locked Loop Circuit Design, Prentice Hall, Englewood Cliffs, NJ, 1993.
    • (1993)
    • Wolaver, D.H.1
  • 24
    • 0035473354 scopus 로고    scopus 로고
    • A digitally controlled phase-locked loop with a digital phase-frequency detection for fast acquisition
    • Oct
    • I. C. Hwang, S. H. Song, and S. W. Kim, A digitally controlled phase-locked loop with a digital phase-frequency detection for fast acquisition, IEEE Journal of Solid-State Circuits, vol. 36, no. 10, pp. 1574-1581, Oct. 2001.
    • (2001) IEEE Journal of Solid-State Circuits , vol.36 , Issue.10 , pp. 1574-1581
    • Hwang, I.C.1    Song, S.H.2    Kim, S.W.3
  • 25
    • 0033099910 scopus 로고    scopus 로고
    • Design and realization of a digital delta-sigma modulator for fractional-N frequency synthesis
    • Mar
    • T. P. Kenny, T. A. Riley, N. M. Filiol, and M. A. Copeland, Design and realization of a digital delta-sigma modulator for fractional-N frequency synthesis, IEEE Transactions on Vehicular Technology, vol. 48, no. 2, pp. 510-521, Mar. 1999.
    • (1999) IEEE Transactions on Vehicular Technology , vol.48 , Issue.2 , pp. 510-521
    • Kenny, T.P.1    Riley, T.A.2    Filiol, N.M.3    Copeland, M.A.4
  • 27
    • 0027590694 scopus 로고
    • Delta-sigma modulation in fractional-N frequency synthesis
    • May
    • T. Riley, M. Copeland, and T. Kwasniewski, Delta-sigma modulation in fractional-N frequency synthesis, IEEE Journal of Solid-State Circuits, vol. 28, no. 5, pp. 553-559, May 1993.
    • (1993) IEEE Journal of Solid-State Circuits , vol.28 , Issue.5 , pp. 553-559
    • Riley, T.1    Copeland, M.2    Kwasniewski, T.3
  • 29
    • 0031332530 scopus 로고    scopus 로고
    • A 27-mW CMOS fractional-N synthesizer using digital compensation for 2.5-Mb/s GFSK modulation
    • Dec
    • M. H. Perrott, T. Tewksbury, and C. Sodini, A 27-mW CMOS fractional-N synthesizer using digital compensation for 2.5-Mb/s GFSK modulation, IEEE Journal of Solid-State Circuits, vol. 32, no. 12, pp. 2048-2060, Dec. 1997.
    • (1997) IEEE Journal of Solid-State Circuits , vol.32 , Issue.12 , pp. 2048-2060
    • Perrott, M.H.1    Tewksbury, T.2    Sodini, C.3
  • 30
    • 0035429509 scopus 로고    scopus 로고
    • A GMSK modulator using a DS frequency discriminatorbased synthesizer
    • Aug
    • W. T. Bax and M. A. Copeland, A GMSK modulator using a DS frequency discriminatorbased synthesizer, IEEE Journal of Solid-State Circuits, vol. 36, no. 8, pp. 1218-1227, Aug. 2001.
    • (2001) IEEE Journal of Solid-State Circuits , vol.36 , Issue.8 , pp. 1218-1227
    • Bax, W.T.1    Copeland, M.A.2
  • 31
    • 0028494585 scopus 로고
    • Variable bandwidth DPLL bit synchronizer with rapid acquisition implemented as a finite state machine
    • Sept
    • H. Brugel and P. F. Driessen, Variable bandwidth DPLL bit synchronizer with rapid acquisition implemented as a finite state machine, IEEE Transactions on Communications, vol. 42, pp. 2751-2759, Sept. 1994.
    • (1994) IEEE Transactions on Communications , vol.42 , pp. 2751-2759
    • Brugel, H.1    Driessen, P.F.2
  • 32
    • 0029289215 scopus 로고
    • An all-digital phase-locked loop with 50-cycle lock time suitable for high performance microprocessors
    • Apr
    • J. Dunning, G. Garcia, J. Lundberg, and E. Nuckolls, An all-digital phase-locked loop with 50-cycle lock time suitable for high performance microprocessors, IEEE Journal of Solid-State Circuits, vol. 30, pp. 412-422, Apr. 1995.
    • (1995) IEEE Journal of Solid-State Circuits , vol.30 , pp. 412-422
    • Dunning, J.1    Garcia, G.2    Lundberg, J.3    Nuckolls, E.4
  • 33
    • 0003857807 scopus 로고    scopus 로고
    • Phase Locked Loops: Design, Simulation and Applications
    • 3rd ed., McGraw-Hill, New York
    • R. E. Best, Phase Locked Loops: Design, Simulation and Applications, 3rd ed., McGraw-Hill, New York, 1997.
    • (1997)
    • Best, R.E.1
  • 34
    • 0033169554 scopus 로고    scopus 로고
    • An all-digital phase-locked loop (ADPLL)-based clock recovery circuit
    • Aug
    • T. Y. Hsu, B. J. Shieh, and C. Y. Lee, An all-digital phase-locked loop (ADPLL)-based clock recovery circuit, IEEE Journal of Solid-State Circuits, vol. 34, pp. 1063-1073, Aug. 1999.
    • (1999) IEEE Journal of Solid-State Circuits , vol.34 , pp. 1063-1073
    • Hsu, T.Y.1    Shieh, B.J.2    Lee, C.Y.3
  • 35
    • 77955990074 scopus 로고    scopus 로고
    • An all-digital clock generator firm-core based on differential fine-tuned delay for reusable microprocessor cores
    • M. Olivieri and A. Trifiletti, An all-digital clock generator firm-core based on differential fine-tuned delay for reusable microprocessor cores, Proceedings of the IEEE Symposium on Circuits and Systems, vol. 4, pp. 638-641, 2001.
    • (2001) Proceedings of the IEEE Symposium on Circuits and Systems , vol.4 , pp. 638-641
    • Olivieri, M.1    Trifiletti, A.2
  • 36
    • 0026943172 scopus 로고
    • A new PLL frequency synthesizer with high switching speed
    • Nov
    • A. Kajiwara and M. Nakagawa, A new PLL frequency synthesizer with high switching speed, IEEE Transactions on Vehicular Technology, vol. 41, no. 4, pp. 407-413, Nov. 1992.
    • (1992) IEEE Transactions on Vehicular Technology , vol.41 , Issue.4 , pp. 407-413
    • Kajiwara, A.1    Nakagawa, M.2
  • 40
    • 84906837868 scopus 로고    scopus 로고
    • CMOS technology for RF applications
    • Proceedings of the 22nd International Conference on Microelectronics, May
    • H. Iwai, CMOS technology for RF applications, Proceedings of the 22nd International Conference on Microelectronics, vol. 1, pp. 27-34, May 2000.
    • (2000) , vol.1 , pp. 27-34
    • Iwai, H.1
  • 42
    • 0033100432 scopus 로고    scopus 로고
    • GSM transceiver front-end circuits in 0.25-mm CMOS
    • Mar
    • Q. Huang, P. Orsatti, and F. Piazza, GSM transceiver front-end circuits in 0.25-mm CMOS, IEEE Journal of Solid-State Circuits, vol. 34, no. 3, pp. 292-303, Mar. 1999.
    • (1999) IEEE Journal of Solid-State Circuits , vol.34 , Issue.3 , pp. 292-303
    • Huang, Q.1    Orsatti, P.2    Piazza, F.3
  • 44
    • 26444593802 scopus 로고    scopus 로고
    • Digitally Assisted Pipeline ADCs: Theory and Implementation
    • Kluwer Academic, Norwell, MA
    • B. Murmann and B. E. Boser, Digitally Assisted Pipeline ADCs: Theory and Implementation, Kluwer Academic, Norwell, MA, 2004.
    • (2004)
    • Murmann, B.1    Boser, B.E.2
  • 45
    • 28844506647 scopus 로고    scopus 로고
    • GS40 0.11-mm CMOS standard cell/gate array
    • in Texas Instruments Application Specific Integrated Circuits Macro Library Summary, Version 1.0, Jan
    • GS40 0.11-mm CMOS standard cell/gate array, in Texas Instruments Application Specific Integrated Circuits Macro Library Summary, Version 1.0, Jan. 2001.
    • (2001)
  • 46
    • 0003887033 scopus 로고    scopus 로고
    • Specification of the BLUETOOTH System
    • Version 1.1, Feb. 22
    • Specification of the BLUETOOTH System, Version 1.1, www.bluetooth.com, Feb. 22, 2001.
    • (2001)
  • 48
    • 84861431725 scopus 로고    scopus 로고
    • The National Technology Roadmap for Semiconductors, Semiconductor Industries Association
    • San Jose, CA
    • The National Technology Roadmap for Semiconductors, Semiconductor Industries Association, San Jose, CA, 1997.
    • (1997)
  • 49
    • 0003653510 scopus 로고
    • Simulation Techniques and Solutions for Mixed-Signal Coupling in Integrated Circuits
    • Kluwer Academic, Norwell, MA
    • N. K. Verghese, T. J. Schmerbeck, and D. J. Allstot, Simulation Techniques and Solutions for Mixed-Signal Coupling in Integrated Circuits, Kluwer Academic, Norwell, MA, 1995.
    • (1995)
    • Verghese, N.K.1    Schmerbeck, T.J.2    Allstot, D.J.3
  • 51
    • 0027872814 scopus 로고
    • Measurements and modeling of MOSFET I-V characteristics with polysilicon depletion effect
    • Dec
    • C. L. Huang and N. D. Arora, Measurements and modeling of MOSFET I-V characteristics with polysilicon depletion effect, IEEE Transactions on Electron Devices, vol. 40, no. 12, pp. 2330-2337, Dec. 1993.
    • (1993) IEEE Transactions on Electron Devices , vol.40 , Issue.12 , pp. 2330-2337
    • Huang, C.L.1    Arora, N.D.2
  • 53
    • 28444499915 scopus 로고    scopus 로고
    • The Designer's Guide to High-Purity Oscillators
    • Kluwer Academic, Norwell, MA
    • E. Hegazi, J. Rael, and A. Abidi, The Designer's Guide to High-Purity Oscillators, Kluwer Academic, Norwell, MA, 2005.
    • (2005)
    • Hegazi, E.1    Rael, J.2    Abidi, A.3
  • 54
    • 0021586347 scopus 로고
    • Random error effects in matched MOS capacitors and current sources
    • Dec
    • J. B. Shyu, G. C. Temes, and F. Krummenacher, Random error effects in matched MOS capacitors and current sources, IEEE Journal of Solid-State Circuits, vol. 19, pp. 948-955, Dec. 1984.
    • (1984) IEEE Journal of Solid-State Circuits , vol.19 , pp. 948-955
    • Shyu, J.B.1    Temes, G.C.2    Krummenacher, F.3
  • 55
    • 0026999467 scopus 로고
    • Digital-domain calibration of multistep analog-to-digital converters
    • Dec
    • S. H. Lee and B. S. Song, Digital-domain calibration of multistep analog-to-digital converters, IEEE Journal of Solid-State Circuits, vol. 27, pp. 1679-1688, Dec. 1992.
    • (1992) IEEE Journal of Solid-State Circuits , vol.27 , pp. 1679-1688
    • Lee, S.H.1    Song, B.S.2
  • 56
    • 0344512371 scopus 로고    scopus 로고
    • Digitally controlled oscillator (DCO)-based architecture for RF frequency synthesis in a deep-submicrometer CMOS process
    • Nov
    • R. B. Staszewski, D. Leipold, K. Muhammad, and P. T. Balsara, Digitally controlled oscillator (DCO)-based architecture for RF frequency synthesis in a deep-submicrometer CMOS process, IEEE Transactions on Circuits and Systems II, vol. 50, no. 11, pp. 815-828, Nov. 2003.
    • (2003) IEEE Transactions on Circuits and Systems II , vol.50 , Issue.11 , pp. 815-828
    • Staszewski, R.B.1    Leipold, D.2    Muhammad, K.3    Balsara, P.T.4
  • 57
    • 0036685487 scopus 로고    scopus 로고
    • A modeling approach for S-D fractional-N frequency synthesizers allowing straightforward noise analysis
    • Aug
    • M. H. Perrott, M. D. Trott, and C. G. Sodini, A modeling approach for S-D fractional-N frequency synthesizers allowing straightforward noise analysis, IEEE Journal of Solid-State Circuits, vol. 37, no. 8, pp. 1028-1038, Aug. 2002.
    • (2002) IEEE Journal of Solid-State Circuits , vol.37 , Issue.8 , pp. 1028-1038
    • Perrott, M.H.1    Trott, M.D.2    Sodini, C.G.3
  • 58
    • 0344512370 scopus 로고    scopus 로고
    • Just-in-time gain estimation of an RF digitally-controlled oscillator for digital direct frequency modulation
    • Nov
    • R. B. Staszewski, D. Leipold, and P. T. Balsara, Just-in-time gain estimation of an RF digitally-controlled oscillator for digital direct frequency modulation, IEEE Transactions on Circuits and Systems II, vol. 50, no. 11, pp. 887-892, Nov. 2003.
    • (2003) IEEE Transactions on Circuits and Systems II , vol.50 , Issue.11 , pp. 887-892
    • Staszewski, R.B.1    Leipold, D.2    Balsara, P.T.3
  • 59
    • 0033905094 scopus 로고    scopus 로고
    • Oscillator phase noise: a tutorial
    • Mar
    • T. H. Lee and A. Hajimiri, Oscillator phase noise: a tutorial, IEEE Journal of Solid-State Circuits, vol. 35, no. 3, pp. 326-336, Mar. 2000.
    • (2000) IEEE Journal of Solid-State Circuits , vol.35 , Issue.3 , pp. 326-336
    • Lee, T.H.1    Hajimiri, A.2
  • 60
    • 0032002580 scopus 로고    scopus 로고
    • A general theory of phase noise in electrical oscillators
    • Feb
    • A. Hajimiri and T. H. Lee, A general theory of phase noise in electrical oscillators, IEEE Journal of Solid-State Circuits, vol. 35, no. 3, pp. 326-336, Feb. 1998.
    • (1998) IEEE Journal of Solid-State Circuits , vol.35 , Issue.3 , pp. 326-336
    • Hajimiri, A.1    Lee, T.H.2
  • 61
    • 0004083482 scopus 로고    scopus 로고
    • The Design of Low Noise Oscillators
    • Kluwer Academic, Norwell, MA
    • A. Hajimiri and T. H. Lee, The Design of Low Noise Oscillators, Kluwer Academic, Norwell, MA, 1999.
    • (1999)
    • Hajimiri, A.1    Lee, T.H.2
  • 62
    • 0003525191 scopus 로고
    • Oversampling methods for A/D and D/A conversion
    • in Oversampling Delta-Sigma Data Converters, IEEE Press, New York
    • J. C. Candy and G. C. Temes, Oversampling methods for A/D and D/A conversion, in Oversampling Delta-Sigma Data Converters, IEEE Press, New York, 1991.
    • (1991)
    • Candy, J.C.1    Temes, G.C.2
  • 63
    • 0034251567 scopus 로고    scopus 로고
    • A 14-bit current-mode S-D DAC based upon rotated data weighted averaging
    • Aug
    • R. E. Radke, A. Eshraghi, and T. S. Fiez, A 14-bit current-mode S-D DAC based upon rotated data weighted averaging, IEEE Journal of Solid-State Circuits, vol. 35, no. 8, pp. 1074-1084, Aug. 2000.
    • (2000) IEEE Journal of Solid-State Circuits , vol.35 , Issue.8 , pp. 1074-1084
    • Radke, R.E.1    Eshraghi, A.2    Fiez, T.S.3
  • 64
    • 0027556587 scopus 로고
    • Interpolation in digital modems, part I: fundamentals
    • Mar
    • F. M. Gardner, Interpolation in digital modems, part I: fundamentals, IEEE Transactions on Communications, vol. 41, no. 3, pp. 501-507, Mar. 1993.
    • (1993) IEEE Transactions on Communications , vol.41 , Issue.3 , pp. 501-507
    • Gardner, F.M.1
  • 66
    • 17144435893 scopus 로고    scopus 로고
    • A high-resolution CMOS time-to-digital converter utilizing a Vernier delay line
    • Feb
    • P. Dudek, S. Szczepanski, and J. Hatfield, A high-resolution CMOS time-to-digital converter utilizing a Vernier delay line, IEEE Journal of Solid-State Circuits, vol. 35, no. 2, pp. 240-247, Feb. 2000.
    • (2000) IEEE Journal of Solid-State Circuits , vol.35 , Issue.2 , pp. 240-247
    • Dudek, P.1    Szczepanski, S.2    Hatfield, J.3
  • 70
    • 0031077390 scopus 로고    scopus 로고
    • Measuring metastability and its effect on communication signal processing systems
    • Feb
    • C. Brown and K. Feher, Measuring metastability and its effect on communication signal processing systems, IEEE Transactions on Instrumentation and Measurement, vol. 46, no. 1, pp. 61-64, Feb. 1997.
    • (1997) IEEE Transactions on Instrumentation and Measurement , vol.46 , Issue.1 , pp. 61-64
    • Brown, C.1    Feher, K.2
  • 71
    • 0034250474 scopus 로고    scopus 로고
    • A 550-Msample/s 8-tap FIR digital filter for magnetic recording read channels
    • Aug
    • R. B. Staszewski, K. Muhammad, and P. Balsara, A 550-Msample/s 8-tap FIR digital filter for magnetic recording read channels, IEEE Journal of Solid-State Circuits, vol. 35, pp. 1205-1210, Aug. 2000.
    • (2000) IEEE Journal of Solid-State Circuits , vol.35 , pp. 1205-1210
    • Staszewski, R.B.1    Muhammad, K.2    Balsara, P.3
  • 72
    • 0035242864 scopus 로고    scopus 로고
    • Speed, power, area, and latency tradeoffs in adaptive FIR filtering for PRML read channels
    • Feb
    • K. Muhammad, R. B. Staszewski, and P. T. Balsara, Speed, power, area, and latency tradeoffs in adaptive FIR filtering for PRML read channels, IEEE Transactions on VLSI Systems, vol. 9, no. 1, pp. 42-51, Feb. 2001.
    • (2001) IEEE Transactions on VLSI Systems , vol.9 , Issue.1 , pp. 42-51
    • Muhammad, K.1    Staszewski, R.B.2    Balsara, P.T.3
  • 74
    • 84940468386 scopus 로고    scopus 로고
    • Design of monolithic phase-locked loops and clock recovery circuits: a tutorial
    • in Monolithic Phase-Locked Loops and Clock Recovery Circuits: Theory and Design, IEEE Press, New York
    • B. Razavi, Design of monolithic phase-locked loops and clock recovery circuits: a tutorial, in Monolithic Phase-Locked Loops and Clock Recovery Circuits: Theory and Design, IEEE Press, New York, 1996.
    • (1996)
    • Razavi, B.1
  • 78
    • 0004164240 scopus 로고
    • Phaselock Techniques
    • Wiley, New York
    • F. M. Gardner, Phaselock Techniques, Wiley, New York, 1979.
    • (1979)
    • Gardner, F.M.1
  • 80
    • 34250706769 scopus 로고    scopus 로고
    • All-digital PLL with ultrafast acquisition
    • Proceedings of the IEEE Asian Solid-State Circuits Conference, Taipei, Taiwan, sec. 11-7, Nov
    • R. B. Staszewski, G. Shriki, and P. T. Balsara, All-digital PLL with ultrafast acquisition, Proceedings of the IEEE Asian Solid-State Circuits Conference, Taipei, Taiwan, sec. 11-7, pp. 289-292, Nov. 2005.
    • (2005) , pp. 289-292
    • Staszewski, R.B.1    Shriki, G.2    Balsara, P.T.3
  • 81
    • 0001839033 scopus 로고    scopus 로고
    • A 200 MHz low jitter adaptive bandwidth PLL
    • Proceedings of the IEEE Solid-State Circuits Conference, sec. WA20.1, 477, Feb
    • J. Lee and B. Kim, A 200 MHz low jitter adaptive bandwidth PLL, Proceedings of the IEEE Solid-State Circuits Conference, sec. WA20.1, pp. 346-347, 477, Feb. 1999.
    • (1999) , pp. 346-347
    • Lee, J.1    Kim, B.2
  • 82
    • 0026838447 scopus 로고
    • A fast pull-in PLL IC using two-mode pull-in technique
    • Electronics and Communications in Japan, pt. 2
    • H. Sato, K. Kato, and T. Sase, A fast pull-in PLL IC using two-mode pull-in technique, Electronics and Communications in Japan, pt. 2, vol. 75, no. 3, pp. 41-50, 1992.
    • (1992) , vol.75 , Issue.3 , pp. 41-50
    • Sato, H.1    Kato, K.2    Sase, T.3
  • 83
    • 22244436604 scopus 로고    scopus 로고
    • Direct frequency modulation of an ADPLL for BLUETOOTH/GSM with injection pulling elimination
    • June
    • R. B. Staszewski, D. Leipold, and P. T. Balsara, Direct frequency modulation of an ADPLL for BLUETOOTH/GSM with injection pulling elimination, IEEE Transactions on Circuits and Systems II, vol. 52, no. 6, pp. 339-343, June 2005.
    • (2005) IEEE Transactions on Circuits and Systems II , vol.52 , Issue.6 , pp. 339-343
    • Staszewski, R.B.1    Leipold, D.2    Balsara, P.T.3
  • 84
    • 0242696125 scopus 로고    scopus 로고
    • A study of injection pulling and locking in oscillators
    • Proceedings of the 2003 IEEE Custom Integrated Circuits Conference, Sept
    • B. Razavi, A study of injection pulling and locking in oscillators, Proceedings of the 2003 IEEE Custom Integrated Circuits Conference, pp. 305-312, Sept. 2003.
    • (2003) , pp. 305-312
    • Razavi, B.1
  • 85
    • 84889419416 scopus 로고
    • Low voltage, high efficiency GaAs class E power amplifiers for wireless transmitters
    • Oct
    • T. Sowlati, C. A. Salama, J. Sitch, G. Rabjohn, and D. Smith, Low voltage, high efficiency GaAs class E power amplifiers for wireless transmitters, IEEE Journal of Solid-State Circuits, vol. 30, no. 10, pp. 1074-1080, Oct. 1995.
    • (1995) IEEE Journal of Solid-State Circuits , vol.30 , Issue.10 , pp. 1074-1080
    • Sowlati, T.1    Salama, C.A.2    Sitch, J.3    Rabjohn, G.4    Smith, D.5
  • 86
    • 0029304629 scopus 로고
    • Discrete simulation of colored noise and stochastic processes and 1/( f a) power law noise generation
    • May
    • N. J. Kasdin, Discrete simulation of colored noise and stochastic processes and 1/( f a) power law noise generation, Proceedings of the IEEE, vol. 8, no. 5, pp. 802-827, May 1995.
    • (1995) Proceedings of the IEEE , vol.8 , Issue.5 , pp. 802-827
    • Kasdin, N.J.1
  • 88
    • 84870580329 scopus 로고
    • Numerical Recipes
    • in C, 2nd ed., Cambridge University Press, Cambridge
    • W. H. Press, S. A. Teukolsky, W. T. Vetterling, and B. P. Flannery, Numerical Recipes in C, 2nd ed., Cambridge University Press, Cambridge, 1994.
    • (1994)
    • Press, W.H.1    Teukolsky, S.A.2    Vetterling, W.T.3    Flannery, B.P.4
  • 91
    • 0027847625 scopus 로고
    • Modeling of real bistables in VHDL
    • Proceedings of the European Design Automation Conference, Sept
    • A. J. Acosta, A. Barriga, M. Valencia, M. Bellido, and J. L. Huertas, Modeling of real bistables in VHDL, Proceedings of the European Design Automation Conference, pp. 460-465, Sept. 1993.
    • (1993) , pp. 460-465
    • Acosta, A.J.1    Barriga, A.2    Valencia, M.3    Bellido, M.4    Huertas, J.L.5


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.