A 27-mW CMOS fractional-N synthesizer using digital compensation for 2.5-Mb/s GFSK modulation

IEEE Journal of Solid-State Circuits

Volumn 32, Issue 12, 1997, Pages 2048-2059

  Perrott, Michael H ^a,b,c,f,g   Tewksbury III, Theodore L ^a,d,e,g,h,i   Sodini, Charles G ^a,b  

^a IEEE   (United States)

^b Massachusetts Institute of Technology Cambridge   (United States)

^c HEWLETT PACKARD LABORATORIES   (United States)

^d ANALOG DEVICES INC   (United States)

^e IBM MICROELECTRONICS   (United States)

^f NEW MEXICO STATE UNIVERSITY   (United States)

^g MASSACHUSETTS INSTITUTE OF TECHNOLOGY   (United States)

^h Analog Devices Inc ^*

ⁱ Converter Group ^*

Author keywords

Compensation; Continuous phase modulation; Digital radio; Frequency modulation; Frequency shift keying; Frequency synthesizers; Phase locked loops; Sigma delta modulation; Transmitters

Indexed keywords

BANDWIDTH; CMOS INTEGRATED CIRCUITS; DELTA MODULATION; DIGITAL FILTERS; FREQUENCY DIVIDING CIRCUITS; FREQUENCY SHIFT KEYING; MODULATORS; PHASE LOCKED LOOPS; PHASE MODULATION; RADIO TRANSMITTERS; STANDARDS;

DIGITAL COMPENSATION; DIGITAL ENHANCED CORDLESS TELECOMMUNICATIONS (DECT) STANDARD; SIGMA DELTA MODULATION;

FREQUENCY SYNTHESIZERS;

EID: 0031332530     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/4.643663     Document Type: Article

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