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Volumn 50, Issue 11, 2003, Pages 815-828

Digitally Controlled Oscillator (DCO)-Based Architecture for RF Frequency Synthesis in a Deep-Submicrometer CMOS Process

Author keywords

Deep submicrometer CMOS; Digital compensation; Digital control; Digitally controlled oscillator (DCO); Frequency synthesizer

Indexed keywords

ALGORITHMS; CMOS INTEGRATED CIRCUITS; DIGITAL CONTROL SYSTEMS; DIGITAL SIGNAL PROCESSING; ELECTRIC POTENTIAL; FREQUENCY SYNTHESIZERS; SILICON; SPURIOUS SIGNAL NOISE; TRANSCEIVERS; TUNING; VOLTAGE CONTROL;

EID: 0344512371     PISSN: 10577130     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCSII.2003.819128     Document Type: Article
Times cited : (166)

References (15)
  • 2
    • 0034247119 scopus 로고    scopus 로고
    • A 900-MHz 1-V CMOS frequency synthesizer
    • Aug.
    • G. K. Dehng, C. Y. Yang, and J. M. Hsu et al., "A 900-MHz 1-V CMOS frequency synthesizer," IEEE J. Solid-State Circuits, vol. 35, pp. 1211-1214, Aug. 2000.
    • (2000) IEEE J. Solid-state Circuits , vol.35 , pp. 1211-1214
    • Dehng, G.K.1    Yang, C.Y.2    Hsu, J.M.3
  • 3
    • 0029289215 scopus 로고
    • An all-digital phase-locked loop with 50-cycle lock time suitable for high performance microprocessors
    • Apr.
    • J. Dunning, G. Garcia, J. Lundberg, and E. Nuckolls, "An all-digital phase-locked loop with 50-cycle lock time suitable for high performance microprocessors," J. Solid-State Circuits, vol. 30, pp. 412-422, Apr. 1995.
    • (1995) J. Solid-state Circuits , vol.30 , pp. 412-422
    • Dunning, J.1    Garcia, G.2    Lundberg, J.3    Nuckolls, E.4
  • 5
    • 0036685487 scopus 로고    scopus 로고
    • A modeling approach for Σ-Δ fractional-N frequency synthesizers allowing straightforward noise analysis
    • Aug.
    • M. H. Perrott, M. D. Trott, and C. G. Sodini, "A modeling approach for Σ-Δ fractional-N frequency synthesizers allowing straightforward noise analysis," IEEE J. Solid-State Circuits, vol. 37, pp. 1028-1038, Aug. 2002.
    • (2002) IEEE J. Solid-state Circuits , vol.37 , pp. 1028-1038
    • Perrott, M.H.1    Trott, M.D.2    Sodini, C.G.3
  • 6
    • 0344512370 scopus 로고    scopus 로고
    • Just-in-time gain estimation of an RF digitally controlled oscillator for digital direct frequency modulation
    • Nov.
    • R. B. Staszewski, D. Leipold, and P. T. Balsara, "Just-in-time gain estimation of an RF digitally controlled oscillator for digital direct frequency modulation," IEEE Trans. Circuits Syst. II, vol. 50, pp. 887-892, Nov. 2003.
    • (2003) IEEE Trans. Circuits Syst. II , vol.50 , pp. 887-892
    • Staszewski, R.B.1    Leipold, D.2    Balsara, P.T.3
  • 7
    • 0027556587 scopus 로고
    • Interpolation in digital modems - Part I: Fundamentals
    • Mar.
    • F. M. Gardner, "Interpolation in digital modems - part I: fundamentals," IEEE Trans. Commun., vol. 41, pp. 501-507, Mar. 1993.
    • (1993) IEEE Trans. Commun. , vol.41 , pp. 501-507
    • Gardner, F.M.1
  • 8
    • 0033905094 scopus 로고    scopus 로고
    • Oscillator phase noise: A tutorial
    • Mar.
    • T. H. Lee and A. Hajimiri, "Oscillator phase noise: a tutorial," IEEE J. Solid-State Circuits, vol. 35, pp. 326-336, Mar. 2000.
    • (2000) IEEE J. Solid-state Circuits , vol.35 , pp. 326-336
    • Lee, T.H.1    Hajimiri, A.2
  • 9
    • 0242346481 scopus 로고    scopus 로고
    • A general theory of phase noise in electrical oscillators
    • Feb.
    • A. Hajimiri and T. H. Lee, "A general theory of phase noise in electrical oscillators," IEEE J. Solid-State Circuits, vol. 35, pp. 326-336, Feb. 1998.
    • (1998) IEEE J. Solid-state Circuits , vol.35 , pp. 326-336
    • Hajimiri, A.1    Lee, T.H.2
  • 11
    • 0002379498 scopus 로고
    • Oversampling methods for A/D and D/A conversion
    • Piscataway, NJ: IEEE Press
    • J. C. Candy and G. C. Temes, "Oversampling methods for A/D and D/A conversion," in Oversampling Delta-Sigma Data Conveners. Piscataway, NJ: IEEE Press, 1991.
    • (1991) Oversampling Delta-sigma Data Conveners
    • Candy, J.C.1    Temes, G.C.2
  • 12
    • 0026169365 scopus 로고
    • A multiple modulator fractional divider
    • June
    • B. Miller and R. J. Conley, "A multiple modulator fractional divider," IEEE Trans. Instrum. Meas., vol. 40, pp. 578-583, June 1991.
    • (1991) IEEE Trans. Instrum. Meas. , vol.40 , pp. 578-583
    • Miller, B.1    Conley, R.J.2
  • 13
    • 0023537896 scopus 로고
    • A 16-bit Oversampling A/D conversion technology using triple integration noise shaping
    • Dec.
    • Y. Matsua et al., "A 16-bit Oversampling A/D conversion technology using triple integration noise shaping," IEEE J. Solid-State Circuits, vol. SC-22, pp. 921-929, Dec. 1987.
    • (1987) IEEE J. Solid-state Circuits , vol.SC-22 , pp. 921-929
    • Matsua, Y.1
  • 14
    • 0034251567 scopus 로고    scopus 로고
    • A 14-bit current-mode Σ-Δ DAC based upon rotated data weighted averaging
    • Aug.
    • R. E. Radke, A. Eshraghi, and T. S. Fiez, "A 14-bit current-mode Σ-Δ DAC based upon rotated data weighted averaging," IEEE J. Solid-State Circuits, vol. 35, pp. 1074-1084, Aug. 2000.
    • (2000) IEEE J. Solid-state Circuits , vol.35 , pp. 1074-1084
    • Radke, R.E.1    Eshraghi, A.2    Fiez, T.S.3
  • 15
    • 0026943172 scopus 로고
    • A new PLL frequency synthesizer with high switching speed
    • Nov.
    • A. Kajiwara and M. Nakagawa, "A new PLL frequency synthesizer with high switching speed," IEEE Trans. Veh. Technol., vol. 41, pp. 407-413, Nov. 1992.
    • (1992) IEEE Trans. Veh. Technol. , vol.41 , pp. 407-413
    • Kajiwara, A.1    Nakagawa, M.2


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.