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Volumn 52, Issue 4, 2005, Pages 723-733

Event-driven simulation and modeling of phase noise of an RF oscillator

Author keywords

Bluetooth; Event driven; Jitter; Modeling; Oscillator; Phase noise; Simulation; System on chip (SoC); VHDL; Wireless

Indexed keywords

CMOS INTEGRATED CIRCUITS; COMPUTER SIMULATION; INTEGRATED CIRCUIT MANUFACTURE; JITTER; MATHEMATICAL MODELS; PHASE LOCKED LOOPS; SPURIOUS SIGNAL NOISE; TIME DOMAIN ANALYSIS; TRANSCEIVERS;

EID: 18144411685     PISSN: 10577122     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCSI.2005.844236     Document Type: Article
Times cited : (112)

References (12)
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    • R. B. Staszewski, C.-M. Hung, D. Leipold and P. T. Balsara, "A first multigigahertz digitally controlled oscillator for wireless applications," IEEE Trans. Microwave Theory Tech., vol. 51, no. 11, pp. 2154-2164, Nov. 2003.
    • (2003) IEEE Trans. Microwave Theory Tech. , vol.51 , Issue.11 , pp. 2154-2164
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  • 2
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    • "Digitally controlled oscillator (DCO)-based architecture for RF frequency synthesis in a deep-submicrometer CMOS process"
    • Nov
    • R. B. Staszewski, D. Leipold, K. Muhammad, and P. T. Balsara, "Digitally controlled oscillator (DCO)-based architecture for RF frequency synthesis in a deep-submicrometer CMOS process," IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process., vol. 50, no. 11, pp. 815-828, Nov. 2003.
    • (2003) IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process. , vol.50 , Issue.11 , pp. 815-828
    • Staszewski, R.B.1    Leipold, D.2    Muhammad, K.3    Balsara, P.T.4
  • 3
    • 0344512370 scopus 로고    scopus 로고
    • "Just-in-time gain estimation of an RF digitally controlled oscillator for digital direct frequency modulation"
    • Nov
    • R. B. Staszewski, D. Leipold, and P. T. Balsara, "Just-in-time gain estimation of an RF digitally controlled oscillator for digital direct frequency modulation," IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process., vol. 50, no. 11, pp. 887-892, Nov. 2003.
    • (2003) IEEE Trans. Circuits Syst. II, Analog Digit. Signal Process. , vol.50 , Issue.11 , pp. 887-892
    • Staszewski, R.B.1    Leipold, D.2    Balsara, P.T.3
  • 5
    • 2442647552 scopus 로고    scopus 로고
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    • Feb
    • K. Muhammad, D. Leipold, and B. Staszewski et al., "A discrete-time Bluetooth receiver in a 0.13 μm digital CMOS process," in Proc. IEEE Solid-State Circuits Conf., Feb. 2004, pp. 268-269.
    • (2004) Proc. IEEE Solid-State Circuits Conf. , pp. 268-269
    • Muhammad, K.1    Leipold, D.2    Staszewski, B.3
  • 6
    • 0004200915 scopus 로고    scopus 로고
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    • Razavi, B.1
  • 10
    • 84963799762 scopus 로고    scopus 로고
    • "General SSCR vs. cycle-to-cycle jitter relationship with application to the phase noise in PLL"
    • Feb
    • A. Zanchi, A. Bonfanti, and S. Levantino et al., "General SSCR vs. cycle-to-cycle jitter relationship with application to the phase noise in PLL," in Proc. Southwest Symp. Mixed-Signal Design, Feb. 2001, pp. 32-37.
    • (2001) Proc. Southwest Symp. Mixed-Signal Design , pp. 32-37
    • Zanchi, A.1    Bonfanti, A.2    Levantino, S.3
  • 11
    • 0029304629 scopus 로고
    • α) power law noise generation"
    • May
    • α) power law noise generation," Proc. IEEE, vol. 8, no. 5, pp. 802-827, May 1995.
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    • Kasdin, N.J.1


* 이 정보는 Elsevier사의 SCOPUS DB에서 KISTI가 분석하여 추출한 것입니다.