Improved sense-amplifier-based flip-flop: design and measurements

IEEE Journal of Solid-State Circuits

Volumn 35, Issue 6, 2000, Pages 876-884

  Nikolić, Borivoje ^a   Oklobdžija, Vojin G ^b,c,f,g   Stojanovič, Vladimir ^d   Jia, Wenyan ^e   Chiu, James Kar Shing ^e   Leung, Michael Ming Tak ^e  

^a UNIVERSITY OF CALIFORNIA   (United States)

^b Integration Corporation   (United States)

^c University of California   (United States)

^d Stanford University   (United States)

^e TEXAS INSTRUMENTS   (United States)

^f UNIVERSITY OF CALIFORNIA   (United States)

^g UNIVERSITY OF CALIFORNIA   (United States)

Author keywords

[No Author keywords available]

Indexed keywords

AMPLIFIERS (ELECTRONIC); CMOS INTEGRATED CIRCUITS; DIGITAL INTEGRATED CIRCUITS; ELECTRIC NETWORK TOPOLOGY; INTEGRATED CIRCUIT LAYOUT; PULSE GENERATORS;

CLOCKING; CROSS COUPLED SET RESET LATCH; SENSE AMPLIFIER BASED FLIP FLOP;

FLIP FLOP CIRCUITS;

EID: 0342906692     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/4.845191     Document Type: Article

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