2 V 900 MHz CMOS phase-locked loop

IEEE Symposium on VLSI Circuits, Digest of Technical Papers

Volumn , Issue , 1998, Pages 52-53

  Wu, Jieh Tsorng ^a   Chen, Mu Jung ^a   Hsu, Cheng Chung ^a  

^a NATIONAL CHIAO TUNG UNIVERSITY   (Taiwan)

Author keywords

[No Author keywords available]

Indexed keywords

CMOS INTEGRATED CIRCUITS; ELECTRIC CONVERTERS; INTEGRATED CIRCUIT MANUFACTURE; INTEGRATED CIRCUIT TESTING; SPURIOUS SIGNAL NOISE; VARIABLE FREQUENCY OSCILLATORS;

CHARGE PUMPS; PHASE FREQUENCY DETECTORS (PFD); PHASE NOISE;

PHASE LOCKED LOOPS;

EID: 0031637795     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: None     Document Type: Conference Paper

References (0)