-
1
-
-
0015127532
-
Memristor - The missing circuit element
-
Sep
-
L. O. Chua "Memristor - The missing circuit element," IEEE Trans. Circuit Theory, vol. 18, no. 5, pp. 507-519, Sep. 1971.
-
(1971)
IEEE Trans. Circuit Theory
, vol.18
, Issue.5
, pp. 507-519
-
-
Chua, L.O.1
-
2
-
-
43049126833
-
The missing memristor found
-
DOI 10.1038/nature06932, PII NATURE06932
-
D. B. Strukov, G. S. Snider, D. R. Stewart, and R. S. Williams, "The missing memristor found," Nature, vol. 453, no. 7191, pp. 80-83, May 2008. (Pubitemid 351630336)
-
(2008)
Nature
, vol.453
, Issue.7191
, pp. 80-83
-
-
Strukov, D.B.1
Snider, G.S.2
Stewart, D.R.3
Williams, R.S.4
-
3
-
-
57849122145
-
How we found the missing memristor
-
Dec
-
R. Williams, "How we found the missing memristor," IEEE Spectr., vol. 45, no. 12, pp. 28-35, Dec. 2008.
-
(2008)
IEEE Spectr
, vol.45
, Issue.12
, pp. 28-35
-
-
Williams, R.1
-
4
-
-
79959480299
-
Silver chalcogenide based memristor devices
-
Oct
-
A. S. Oblea, A. Timilsina, D. Moore, and K. A. Campbell, "Silver chalcogenide based memristor devices," in Proc. Int. J. Comp. Netw., Oct. 2010, pp. 1-3.
-
(2010)
Proc. Int. J. Comp. Netw
, pp. 1-3
-
-
Oblea, A.S.1
Timilsina, A.2
Moore, D.3
Campbell, K.A.4
-
5
-
-
46749093701
-
Memristive switching mechanism for metal/oxide/metal nanodevices
-
Jun
-
J. J. Yang, M. D. Pickett, X. Li, D. A. A. Ohlberg, D. R. Stewart, and R. S. Williams, "Memristive switching mechanism for metal/oxide/metal nanodevices," Nat. Nanotechnol., vol. 3, pp. 429-433, Jun. 2008.
-
(2008)
Nat. Nanotechnol
, vol.3
, pp. 429-433
-
-
Yang, J.J.1
Pickett, M.D.2
Li, X.3
Ohlberg, D.A.A.4
Stewart, D.R.5
Williams, R.S.6
-
6
-
-
83455179487
-
Anatomy of a nanoscale conduction channel reveals the mechanism of a high-performance memristor
-
Nov
-
F. Miao, J. P. Strachan, J. J. Yang, M.-X. Zhang, I. Goldfarb, A. C. Torrezan, P. Eschbach, R. D. Kelley, G. Medeiros-Ribeiro, and R. S. Williams, "Anatomy of a nanoscale conduction channel reveals the mechanism of a high-performance memristor," Adv. Mater., vol. 23, no. 47, pp. 5633-5640, Nov. 2011.
-
(2011)
Adv. Mater
, vol.23
, Issue.47
, pp. 5633-5640
-
-
Miao, F.1
Strachan, J.P.2
Yang, J.J.3
Zhang, M.-X.4
Goldfarb, I.5
Torrezan, A.C.6
Eschbach, P.7
Kelley, R.D.8
Medeiros-Ribeiro, G.9
Williams, R.S.10
-
7
-
-
77951026760
-
Nanoscale memristor device as synapse in neuromorphic systems
-
Mar
-
S. H. Jo, T. Chang, I. Ebong, B. B. Bhadviya, P. Mazumder, and W. Lu, "Nanoscale memristor device as synapse in neuromorphic systems," Nano Letters, vol. 10, pp. 1297-1301, Mar. 2010.
-
(2010)
Nano Letters
, vol.10
, pp. 1297-1301
-
-
Jo, S.H.1
Chang, T.2
Ebong, I.3
Bhadviya, B.B.4
Mazumder, P.5
Lu, W.6
-
8
-
-
77954144265
-
Memristive behavior in thin anodic titania
-
Jul
-
K. Miller, K. S. Nalwa, A. Bergerud, N. M. Neihart, and S. Chaudhary, "Memristive behavior in thin anodic titania," IEEE Electron Device Lett., vol. 31. no. 7, pp. 737-739, Jul. 2010.
-
(2010)
IEEE Electron Device Lett
, vol.31
, Issue.7
, pp. 737-739
-
-
Miller, K.1
Nalwa, K.S.2
Bergerud, A.3
Neihart, N.M.4
Chaudhary, S.5
-
9
-
-
84876932092
-
-
Master's Thesis, Iowa State Univ., Electrical and Computer Engineering (VLSI), Ames, Iowa
-
K. Miller, "Fabrication and modeling of thin-film anodic titania memristors," Master's Thesis, Iowa State Univ., Electrical and Computer Engineering (VLSI), Ames, Iowa, 2010.
-
(2010)
Fabrication and Modeling of Thin-film Anodic Titania Memristors
-
-
Miller, K.1
-
10
-
-
67651052543
-
The elusive memristor: Properties of basic electrical circuits
-
Y. N. Joglekar and S. J. Wolf, "The elusive memristor: Properties of basic electrical circuits," Eur. J. Phys., vol. 30, no. 661, pp. 661-675, 2009.
-
(2009)
Eur. J. Phys
, vol.30
, Issue.661
, pp. 661-675
-
-
Joglekar, Y.N.1
Wolf, S.J.2
-
11
-
-
80053572395
-
Memristive synapses are becoming a reality
-
Nov
-
M. Laiho, E. Lehtonen, A. Russel, and P. Dudek, "Memristive synapses are becoming a reality," Neuromorhic Eng., pp. 1-3, Nov. 2010.
-
(2010)
Neuromorhic Eng
, pp. 1-3
-
-
Laiho, M.1
Lehtonen, E.2
Russel, A.3
Dudek, P.4
-
12
-
-
77955765782
-
Compact method for modeling and simulation of memristor devices: Ion conductor chalcogenidebased memristor devices
-
Jun
-
R. E. Pino, J. W. Bohl, N. McDonald, B. Wysocki, P. Rozwood, K. A. Campbell, A. Oblea, and A. Timilsina, "Compact method for modeling and simulation of memristor devices: Ion conductor chalcogenidebased memristor devices," in Proc. IEEE/ACM Int. Symp. Nanoscale Architectures, Jun. 2010, pp. 1-4.
-
(2010)
Proc. IEEE/ACM Int. Symp. Nanoscale Architectures
, pp. 1-4
-
-
Pino, R.E.1
Bohl, J.W.2
McDonald, N.3
Wysocki, B.4
Rozwood, P.5
Campbell, K.A.6
Oblea, A.7
Timilsina, A.8
-
13
-
-
80053563894
-
A memristor device model
-
Oct
-
C. Yakopcic, T. M. Taha, G. Subramanyam, R. E. Pino, and S. Rogers, "A memristor device model," IEEE Electron Device Lett.s, vol. 32, no. 10, pp. 1436-1438, Oct. 2011.
-
(2011)
IEEE Electron Device Lett.s
, vol.32
, Issue.10
, pp. 1436-1438
-
-
Yakopcic, C.1
Taha, T.M.2
Subramanyam, G.3
Pino, R.E.4
Rogers, S.5
-
14
-
-
70350457460
-
Spice model of memristor with nonlinear dopant drift
-
Z. Biolek, D. Biolek, and V. Biolkov'a, "Spice model of memristor with nonlinear dopant drift," Radioengineering, vol. 18, no. 2, pp. 210-214, 2009.
-
(2009)
Radioengineering
, vol.18
, Issue.2
, pp. 210-214
-
-
Biolek, Z.1
Biolek, D.2
Biolkov'A, V.3
-
16
-
-
79951680671
-
A memristor SPICE implementation and a new approach for magnetic flux-controlled memristor modeling
-
Mar
-
D. Batas and H. Fiedler, "A memristor SPICE implementation and a new approach for magnetic flux-controlled memristor modeling," IEEE Trans. Nanotechnol., vol. 10, no. 2, Mar. 2011.
-
(2011)
IEEE Trans. Nanotechnol
, vol.10
, Issue.2
-
-
Batas, D.1
Fiedler, H.2
-
17
-
-
77949910490
-
Macromodeling of the memristor in spice
-
Apr
-
A. Rak and G. Cserey, "Macromodeling of the memristor in spice," IEEE Trans. Computer Aided Des. Integr. Circuits Syst., vol. 29, no. 4, pp. 632-636, Apr. 2010.
-
(2010)
IEEE Trans. Computer Aided Des. Integr. Circuits Syst
, vol.29
, Issue.4
, pp. 632-636
-
-
Rak, A.1
Cserey, G.2
-
18
-
-
63349111176
-
On SPICE macromodelling of TiO2 memristors
-
S. Benderli and T. Wey, "On SPICE macromodelling of TiO2 memristors," Electron. Lett., vol. 45, no. 7, pp. 377-379, 2009.
-
(2009)
Electron. Lett
, vol.45
, Issue.7
, pp. 377-379
-
-
Benderli, S.1
Wey, T.2
-
20
-
-
79959342648
-
Synaptic behaviors and modeling of a metal oxide memristor device
-
Feb
-
T. Chang, S. H. Jo, K. H. Kim, P. Sheridan, S. Gaba, and W. Lu, "Synaptic behaviors and modeling of a metal oxide memristor device," Appl. Phys. A, vol. 102, no. 4, pp. 857-863, Feb. 2011.
-
(2011)
Appl. Phys. A
, vol.102
, Issue.4
, pp. 857-863
-
-
Chang, T.1
Jo, S.H.2
Kim, K.H.3
Sheridan, P.4
Gaba, S.5
Lu, W.6
-
21
-
-
79960855655
-
SPICE modeling of memristors
-
H. Abdalla and M. D. Pickett, "SPICE modeling of memristors," in Proc. ISCAS, 2011, pp. 1832-1835 .
-
(2011)
Proc. ISCAS
, pp. 1832-1835
-
-
Abdalla, H.1
Pickett, M.D.2
-
22
-
-
84867310091
-
A closed form memristor SPICE model and oscillator
-
Aug
-
I. Abraham, S. Kaya, and G. Pennington, "A closed form memristor SPICE model and oscillator," in Proc. IEEE MWSCAS, Aug. 2012, pp. 1192-1195.
-
(2012)
Proc. IEEE MWSCAS
, pp. 1192-1195
-
-
Abraham, I.1
Kaya, S.2
Pennington, G.3
-
23
-
-
84865683982
-
Analysis and modeling of internal state variables for dynamic effects of nonvolatile memory devices
-
Sep
-
Y. Shang, W. Fei, and H. Yu, "Analysis and modeling of internal state variables for dynamic effects of nonvolatile memory devices," in Proc. IEEE TCAS, vol. 59, no. 9. Sep. 2012, pp. 1906-1918
-
(2012)
Proc. IEEE TCAS
, vol.59
, Issue.9
, pp. 1906-1918
-
-
Shang, Y.1
Fei, W.2
Yu, H.3
-
24
-
-
84872100046
-
TEAM: ThrEshold adaptive memristor model
-
S. Kvatinsky, E. G. Friedman, A. Kolodny, and U. C. Weiser, "TEAM: ThrEshold adaptive memristor model, " in Proc. IEEE TCAS, vol. 60, no. 1, pp. 211-221, 2012.
-
(2012)
Proc. IEEE TCAS
, vol.60
, Issue.1
, pp. 211-221
-
-
Kvatinsky, S.1
Friedman, E.G.2
Kolodny, A.3
Weiser, U.C.4
-
25
-
-
78649854058
-
Memristor-based pattern recognition for image processing: An adaptive coded aperture imaging and sensing opportunity
-
C. Yakopcic, T. M. Taha, G. Subramanyam, E. Shin, P. T. Murray, and S. Rogers, "Memristor-based pattern recognition for image processing: An adaptive coded aperture imaging and sensing opportunity," in Proc. SPIE Adaptive Coded Aperture Imag. Non-Imag. Sens., vol. 7818. 2010, p. 78180E.
-
(2010)
Proc. SPIE Adaptive Coded Aperture Imag. Non-Imag. Sens
, vol.7818
-
-
Yakopcic, C.1
Taha, T.M.2
Subramanyam, G.3
Shin, E.4
Murray, P.T.5
Rogers, S.6
-
26
-
-
9144258943
-
Generalized formula for the electric tunnel effect between similar electrodes separated by a thin insulating film
-
J. G. Simmons, "Generalized formula for the electric tunnel effect between similar electrodes separated by a thin insulating film," J. Appl. Phys., vol. 34, no. 6, p. 16, 1963.
-
(1963)
J. Appl. Phys
, vol.34
, Issue.6
, pp. 16
-
-
Simmons, J.G.1
-
27
-
-
70350092588
-
Switching dynamics in titanium dioxide memristive devices
-
M. D. Pickett, D. B. Strukov, J. L. Borghetti, J. J. Yang, G. S. Snider, D. R. Stewart, and R. S. Williams, "Switching dynamics in titanium dioxide memristive devices," J. Appl. Phys., vol. 106, no. 7, p. 074508, 2009.
-
(2009)
J. Appl. Phys
, vol.106
, Issue.7
, pp. 074508
-
-
Pickett, M.D.1
Strukov, D.B.2
Borghetti, J.L.3
Yang, J.J.4
Snider, G.S.5
Stewart, D.R.6
Williams, R.S.7
-
28
-
-
40449092679
-
CMOS compatible nanoscale nonvolatile resistance switching memory
-
DOI 10.1021/nl073225h
-
S. H. Jo and W. Lu, "CMOS compatible nanoscale nonvolatile resistance switching memory," Nano Lett., vol. 8, no. 2, pp. 392-397, Jan. 2008. (Pubitemid 351345988)
-
(2008)
Nano Letters
, vol.8
, Issue.2
, pp. 392-397
-
-
Jo, S.H.1
Lu, W.2
-
29
-
-
79954578978
-
Progress in rectifying-based RRAM passive crossbar array
-
Apr
-
K. W. Zhang, S. B. Long, Q. Liu, H. B. LU, Y. T. Li, Y. Wang, W. T. Lian, M. Wang, S. Zhang, and M. Liu, "Progress in rectifying-based RRAM passive crossbar array," Sci. China Technol. Sci., vol. 54, pp. 1-8, Apr. 2011.
-
(2011)
Sci. China Technol. Sci
, vol.54
, pp. 1-8
-
-
Zhang, K.W.1
Long, S.B.2
Liu, Q.3
Lu, H.B.4
Li, Y.T.5
Wang, Y.6
Lian, W.T.7
Wang, M.8
Zhang, S.9
Liu, M.10
-
30
-
-
80054759109
-
Multiple memristor read and write circuit for neuromorphic applications
-
C. Yakopcic, T. M. Taha, G. Subramanyam, and S. Rogers, "Multiple memristor read and write circuit for neuromorphic applications," in Proc. Int. Joint Conf. Neural Netw., 2011, pp. 2676-2682 .
-
(2011)
Proc. Int. Joint Conf. Neural Netw
, pp. 2676-2682
-
-
Yakopcic, C.1
Taha, T.M.2
Subramanyam, G.3
Rogers, S.4
-
31
-
-
77956206650
-
Impact of process variations on emerging Memristor
-
D. Niu, Y. Chen, C. Xu, and Y. Xie, "Impact of process variations on emerging Memristor," in Proc. 47th Proc. ACM/IEEE Des. Automation Conf., 2010, pp. 877-882.
-
(2010)
Proc. 47th Proc. ACM/IEEE Des. Automation Conf
, pp. 877-882
-
-
Niu, D.1
Chen, Y.2
Xu, C.3
Xie, Y.4
-
32
-
-
78349261547
-
Self-adaptive write circuit for low-power and variation-tolerant memristor
-
Nov
-
K.-H. Jo, C.-M. Jung, K.-S. Min, and S-M. Kang, "Self-adaptive write circuit for low-power and variation-tolerant memristor," IEEE Trans. Nanotechnol., vol. 9, no. 6, pp. 675-678, Nov. 2010.
-
(2010)
IEEE Trans. Nanotechnol
, vol.9
, Issue.6
, pp. 675-678
-
-
Jo, K.-H.1
Jung, C.-M.2
Min, K.-S.3
Kang, S.-M.4
-
33
-
-
77954466597
-
Design considerations for variation tolerant multilevel CMOS/Nano memristor memory
-
H. Manem, G. S. Rose, X. He, and W. Wang, "Design considerations for variation tolerant multilevel CMOS/Nano memristor memory," in Proc. 20th Symp. VLSI GLSVLSI, 2010, pp. 287-292.
-
(2010)
Proc. 20th Symp. VLSI GLSVLSI
, pp. 287-292
-
-
Manem, H.1
Rose, G.S.2
He, X.3
Wang, W.4
-
34
-
-
79952824977
-
An approach to tolerate process related variations in memristor-based applications
-
J. Rajendran, Maenm, R. Karri, and G. S. Rose, "An approach to tolerate process related variations in memristor-based applications," in Proc. 24th Int. Conf. VLSI Des., 2011, pp. 18-23.
-
(2011)
Proc. 24th Int. Conf. VLSI des
, pp. 18-23
-
-
Rajendran, J.1
Karri, M.R.2
Rose, G.S.3
-
35
-
-
34247463699
-
Designing CMOS/molecular memories while considering device parameter variations
-
Apr
-
G. S. Rose, Y. Yao, J. M. Tour, A. C. Cabe, N. Gergel-Hackett, N. Majumdar, J. C. Bean, L. R. Harriott, and M. Stan. "Designing CMOS/molecular memories while considering device parameter variations," ACM J. Emerging Technol. Comput. Syst., vol. 3, no. 1, pp. 1-24, Apr. 2007.
-
(2007)
ACM J. Emerging Technol. Comput. Syst
, vol.3
, Issue.1
, pp. 1-24
-
-
Rose, G.S.1
Yao, Y.2
Tour, J.M.3
Cabe, A.C.4
Gergel-Hackett, N.5
Majumdar, N.6
Bean, J.C.7
Harriott, L.R.8
Stan, M.9
-
36
-
-
79952966334
-
Geometry variations analysis of TiO2 Thin-Film and Spintronic Memristors
-
M. Hu, H. Li, Y. Chen, X. Wang, and R. E. Pino, "Geometry variations analysis of TiO2 Thin-Film and Spintronic Memristors," in Proc. 16th Asia South Pacific Des. Automation Conf., 2011, pp. 25-30.
-
(2011)
Proc. 16th Asia South Pacific Des. Automation Conf
, pp. 25-30
-
-
Hu, M.1
Li, H.2
Chen, Y.3
Wang, X.4
Pino, R.E.5
-
37
-
-
79961199396
-
Robust neural logic block (NLB) based on memristor crossbar array
-
D. Chabi, W. Zhao, D. Querlioz, and J.-O. Klein, "Robust neural logic block (NLB) based on memristor crossbar array," IEEE/ACM ISNA, pp. 137-143, (2011).
-
(2011)
IEEE/ACM ISNA
, pp. 137-143
-
-
Chabi, D.1
Zhao, W.2
Querlioz, D.3
Klein, J.-O.4
-
38
-
-
80054729052
-
Simulation of a memristorbased spiking neural network immune to device variations
-
D. Querlioz, O. Bichler, and C. Gamrat, "Simulation of a memristorbased spiking neural network immune to device variations," in Proc. Int. Joint Conf. Neural Netw., 2011, pp. 1775-1781.
-
(2011)
Proc. Int. Joint Conf. Neural Netw
, pp. 1775-1781
-
-
Querlioz, D.1
Bichler, O.2
Gamrat, C.3
-
39
-
-
33748353492
-
-
LTspice IV, [Online]
-
LTspice IV, Linear Technology [Online]. Available: http://www.linear. com/ltspice/ (2012).
-
(2012)
Linear Technology
-
-
-
40
-
-
79952921400
-
Two-terminal resistive switches (memristors) for memory and logic applications
-
W. Lu, K.-H. Kim, T. Chang, and S. Gaba, "Two-terminal resistive switches (memristors) for memory and logic applications," in Proc. 16th Asia South Pacific Des. Automation Conf., 2011, pp. 217-223.
-
(2011)
Proc. 16th Asia South Pacific Des. Automation Conf
, pp. 217-223
-
-
Lu, W.1
Kim, K.-H.2
Chang, T.3
Gaba, S.4
-
41
-
-
77955052673
-
Cortical computing with memristive nanodevices
-
G. S. Snider, "Cortical Computing with Memristive Nanodevices," in Proc. SciDAC Review, vol 1, no. 10, pp. 58-65, 2008.
-
(2008)
Proc. SciDAC Review
, vol.1
, Issue.10
, pp. 58-65
-
-
Snider, G.S.1
|