Robust Neural Logic Block (NLB) based on memristor crossbar array

Proceedings of the 2011 IEEE/ACM International Symposium on Nanoscale Architectures, NANOARCH 2011

Volumn , Issue , 2011, Pages 137-143

  Chabi, Djaafar ^a,b   Zhao, Weisheng ^a,b   Querlioz, Damien ^a,b   Klein, Jacques Olivier ^a,b  

^a UNIVERSITÉ PARIS SACLAY   (France)

^b CNRS   (France)

Author keywords

defect and variation tolerance; memristors; neural network; on chip learning; supervised learning

Indexed keywords

CONFIGURABLE LOGIC BLOCKS; CROSSBAR ARRAYS; DEVICE DEFECTS; HIGH ROBUSTNESS; LEARNING CAPABILITIES; LOGIC BLOCKS; MEMRISTOR; MONTE CARLO SIMULATION; NEURAL LEARNING; ON-CHIP LEARNING; PROGRAMMABLE LOGIC; VARIATION TOLERANCES;

BOOLEAN FUNCTIONS; DEFECTS; LOGIC CIRCUITS; MEMRISTORS; NANOSTRUCTURED MATERIALS; NANOTECHNOLOGY; NETWORK ARCHITECTURE; PASSIVE FILTERS; RESISTORS;

NEURAL NETWORKS;

EID: 79961199396     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/NANOARCH.2011.5941495     Document Type: Conference Paper

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