-
1
-
-
67650102619
-
Redox-Based Resistive Switching Memories-Nanoionic Mechanisms, Prospects, and Challenges
-
Waser, R.; Dittmann, R.; Staikov, G.; Szot, K. Redox-Based Resistive Switching Memories-Nanoionic Mechanisms, Prospects, and Challenges Adv. Mater. 2009, 21, 2632-2663
-
(2009)
Adv. Mater.
, vol.21
, pp. 2632-2663
-
-
Waser, R.1
Dittmann, R.2
Staikov, G.3
Szot, K.4
-
2
-
-
84861125089
-
Metal Oxide RRAM
-
Wong, H.-S. P.; Lee, H.-Y.; Yu, S.; Chen, Y.-S.; Wu, Y.; Chen, P.-S.; Lee, B.; Chen, F. T.; Tsai, M.-J. Metal Oxide RRAM Proc. IEEE 2012, 100, 1951-1970
-
(2012)
Proc. IEEE
, vol.100
, pp. 1951-1970
-
-
Wong, H.-S.P.1
Lee, H.-Y.2
Yu, S.3
Chen, Y.-S.4
Wu, Y.5
Chen, P.-S.6
Lee, B.7
Chen, F.T.8
Tsai, M.-J.9
-
3
-
-
61649104641
-
Programmable Resistance Switching in Nanoscale Two-Terminal Devices
-
Jo, S. H.; Kim, K.-H.; Lu, W. Programmable Resistance Switching in Nanoscale Two-Terminal Devices Nano Lett. 2009, 9, 496-500
-
(2009)
Nano Lett.
, vol.9
, pp. 496-500
-
-
Jo, S.H.1
Kim, K.-H.2
Lu, W.3
-
4
-
-
80054950125
-
Nanoscale Bipolar and Complementary Resistive Switching Memory Based on Amorphous Carbon
-
Chai, Y.; Wu, Y.; Takei, K.; Chen, H.-Y.; Yu, S.; Chan, P. C. H.; Javey, A.; Wong, H.-S. P. Nanoscale Bipolar and Complementary Resistive Switching Memory Based on Amorphous Carbon IEEE Trans. Electron Devices 2011, 58, 3933-3939
-
(2011)
IEEE Trans. Electron Devices
, vol.58
, pp. 3933-3939
-
-
Chai, Y.1
Wu, Y.2
Takei, K.3
Chen, H.-Y.4
Yu, S.5
Chan, P.C.H.6
Javey, A.7
Wong, H.-S.P.8
-
6
-
-
65249161894
-
Electrical Manipulation of Nanofilaments in Transition-Metal Oxides for Resistance-Based Memory
-
Lee, M. J.; Han, S.; Jeon, S. H.; Park, B. H.; Kang, B. S.; Ahn, S. E.; Kim, K. H.; Lee, C. B.; Kim, C. J.; Yoo, I. K. et al. Electrical Manipulation of Nanofilaments in Transition-Metal Oxides for Resistance-Based Memory Nano Lett. 2009, 9, 1476-1481
-
(2009)
Nano Lett.
, vol.9
, pp. 1476-1481
-
-
Lee, M.J.1
Han, S.2
Jeon, S.H.3
Park, B.H.4
Kang, B.S.5
Ahn, S.E.6
Kim, K.H.7
Lee, C.B.8
Kim, C.J.9
Yoo, I.K.10
-
7
-
-
46749093701
-
Memristive Switching Mechanism for Metal/Oxide/Metal Nanodevices
-
Yang, J. J.; Pickett, M. D.; Li, X.; Ohlberg, D.; Stewart, D.; Williams, R. S. Memristive Switching Mechanism for Metal/Oxide/Metal Nanodevices Nat. Nanotechnol. 2008, 3, 429-433
-
(2008)
Nat. Nanotechnol.
, vol.3
, pp. 429-433
-
-
Yang, J.J.1
Pickett, M.D.2
Li, X.3
Ohlberg, D.4
Stewart, D.5
Williams, R.S.6
-
8
-
-
84860362446
-
A Multi-Level 40nm WOx Resistive Memory with Excellent Reliability
-
Chien, W.-C.; Lee, M.-H.; Lee, F.-M.; Lin, Y.-Y.; Lung, H.-L.; Hsieh, K.-Y.; Lu, C.-Y. A Multi-Level 40nm WOx Resistive Memory with Excellent Reliability IEEE Tech. Dig. IEDM 2011, 725-728
-
(2011)
IEEE Tech. Dig. IEDM
, pp. 725-728
-
-
Chien, W.-C.1
Lee, M.-H.2
Lee, F.-M.3
Lin, Y.-Y.4
Lung, H.-L.5
Hsieh, K.-Y.6
Lu, C.-Y.7
-
9
-
-
79951833149
-
Evidence and Solution of Over-RESET Problem for HfOx Based Resistive Memory with Sub-ns Switching Speed and High Endurance
-
Lee, H. Y.; Chen, Y. S.; Chen, P. S.; Gu, P. Y.; Hsu, Y. Y.; Wang, S. M.; Liu, W. H.; Tsai, C. H.; Sheu, S. S.; Chiang, P. C. et al. Evidence and Solution of Over-RESET Problem for HfOx Based Resistive Memory with Sub-ns Switching Speed and High Endurance IEEE Tech. Dig. IEDM 2010, 460-463
-
(2010)
IEEE Tech. Dig. IEDM
, pp. 460-463
-
-
Lee, H.Y.1
Chen, Y.S.2
Chen, P.S.3
Gu, P.Y.4
Hsu, Y.Y.5
Wang, S.M.6
Liu, W.H.7
Tsai, C.H.8
Sheu, S.S.9
Chiang, P.C.10
-
10
-
-
84859214431
-
2 Hf/HfOx Crossbar Resistive RAM with Excellent Performance, Reliability and Low-Energy Operation
-
2 Hf/HfOx Crossbar Resistive RAM with Excellent Performance, Reliability and Low-Energy Operation IEEE Tech. Dig. IEDM 2011, 729-732
-
(2011)
IEEE Tech. Dig. IEDM
, pp. 729-732
-
-
Govoreanu, B.1
Kar, G.S.2
Chen, Y.-Y.3
Paraschiv, V.4
Kubicek, S.5
Fantini, A.6
Radu, I.P.7
Goux, L.8
Clima, S.9
Degraeve, R.10
-
11
-
-
79960642086
-
2- x Bilayer Structures
-
2- x Bilayer Structures Nat. Mater. 2011, 10, 625-630
-
(2011)
Nat. Mater.
, vol.10
, pp. 625-630
-
-
Lee, M.-J.1
Lee, C.B.2
Lee, D.3
Lee, S.R.4
Chang, M.5
Hur, J.H.6
Kim, Y.-B.7
Kim, C.-J.8
Seo, D.H.9
Seo, S.10
-
12
-
-
80052683906
-
Forming-Free Nitrogen-Doped AlOx RRAM with Sub-μA Programming Current
-
Kim, W.; Park, S. I.; Zhang, Z.; Yang-Liauw, Y.; Sekar, D.; Wong, H.-S. P.; Wong, S. Forming-Free Nitrogen-Doped AlOx RRAM with Sub-μA Programming Current Tech. Dig. Symp. VLSI Technol. 2011, 22-23
-
(2011)
Tech. Dig. Symp. VLSI Technol.
, pp. 22-23
-
-
Kim, W.1
Park, S.I.2
Zhang, Z.3
Yang-Liauw, Y.4
Sekar, D.5
Wong, H.-S.P.6
Wong, S.7
-
13
-
-
79955726402
-
A 4Mb Embedded SLC Resistive-RAM Macro with 7.2ns Read-Write Random-Access Time and 160ns MLC-Access Capability
-
Sheu, S.-S.; Chang, M.-F.; Lin, K.-F.; Wu, C.-W.; Chen, Y.-S.; Chiu, P.-F.; Kuo, C.-C.; Yang, Y.-S.; Chiang, P.-C.; Lin, W.-P. et al. A 4Mb Embedded SLC Resistive-RAM Macro with 7.2ns Read-Write Random-Access Time and 160ns MLC-Access Capability IEEE Tech. Dig. ISSCC 2011, 200-202
-
(2011)
IEEE Tech. Dig. ISSCC
, pp. 200-202
-
-
Sheu, S.-S.1
Chang, M.-F.2
Lin, K.-F.3
Wu, C.-W.4
Chen, Y.-S.5
Chiu, P.-F.6
Kuo, C.-C.7
Yang, Y.-S.8
Chiang, P.-C.9
Lin, W.-P.10
-
14
-
-
84859216579
-
On the Switching Parameter Variation of Metal Oxide RRAM - Part II: Model Corroboration and Device Design Strategy
-
Yu, S.; Guan, X.; Wong, H.-S. P. On the Switching Parameter Variation of Metal Oxide RRAM-Part II: Model Corroboration and Device Design Strategy IEEE Trans. Electron Devices 2012, 59, 1183-1189
-
(2012)
IEEE Trans. Electron Devices
, vol.59
, pp. 1183-1189
-
-
Yu, S.1
Guan, X.2
Wong, H.-S.P.3
-
15
-
-
84876120938
-
Scaling Directions for 2D and 3D NAND Cells
-
Goda, A.; Parat, K. Scaling Directions for 2D and 3D NAND Cells IEEE Tech. Dig. IEDM 2012, 13-16
-
(2012)
IEEE Tech. Dig. IEDM
, pp. 13-16
-
-
Goda, A.1
Parat, K.2
-
16
-
-
36448932248
-
Bit Cost Scalable Technology with Punch and Plug Process for Ultra High Density Flash Memory
-
Tanaka, H.; Kido, M.; Yahashi, K.; Oomura, M.; Katsumata, R.; Kito, M.; Fukuzumi, Y.; Sato, M.; Nagata, Y.; Matsuoka, Y. et al. Bit Cost Scalable Technology with Punch and Plug Process for Ultra High Density Flash Memory Tech. Dig. Symp. VLSI Technol. 2007, 14-15
-
(2007)
Tech. Dig. Symp. VLSI Technol.
, pp. 14-15
-
-
Tanaka, H.1
Kido, M.2
Yahashi, K.3
Oomura, M.4
Katsumata, R.5
Kito, M.6
Fukuzumi, Y.7
Sato, M.8
Nagata, Y.9
Matsuoka, Y.10
-
17
-
-
71049154997
-
Multi-Layered Vertical Gate NAND Flash Overcoming Stacking Limit for Terabit Density Storage
-
Kim, W.; Choi, S.; Sung, J.; Lee, T.; Park, C.; Ko, H.; Jung, J.; Yoo, I.; Park, Y. Multi-Layered Vertical Gate NAND Flash Overcoming Stacking Limit for Terabit Density Storage Tech. Dig. Symp. VLSI Technol. 2009, 188-199
-
(2009)
Tech. Dig. Symp. VLSI Technol.
, pp. 188-199
-
-
Kim, W.1
Choi, S.2
Sung, J.3
Lee, T.4
Park, C.5
Ko, H.6
Jung, J.7
Yoo, I.8
Park, Y.9
-
18
-
-
71049151625
-
Vertical Cell Array Using TCAT (Terabit Cell Array Transistor) Technology for Ultra High Density NAND Flash Memory
-
Jang, J.; Kim, H.-S.; Cho, W.; Cho, H.; Kim, J.; Shim, S. I.; Jang, Y.; Jeong, J.-H.; Son, B.-K.; Kim, D. W. et al. Vertical Cell Array Using TCAT (Terabit Cell Array Transistor) Technology for Ultra High Density NAND Flash Memory Tech. Dig. Symp. VLSI Technol. 2009, 192-193
-
(2009)
Tech. Dig. Symp. VLSI Technol.
, pp. 192-193
-
-
Jang, J.1
Kim, H.-S.2
Cho, W.3
Cho, H.4
Kim, J.5
Shim, S.I.6
Jang, Y.7
Jeong, J.-H.8
Son, B.-K.9
Kim, D.W.10
-
19
-
-
71049162177
-
Pipe-Shaped BiCS Flash Memory with 16 Stacked Layers and Multi-Level-Cell Operation for Ultra High Density Storage Devices
-
Katsumata, R.; Kito, M.; Fukuzumi, Y.; Kido, M.; Tanaka, H.; Komori, Y.; Ishiduki, M.; Matsunami, J.; Fujiwara, T.; Nagata, Y. et al. Pipe-Shaped BiCS Flash Memory with 16 Stacked Layers and Multi-Level-Cell Operation for Ultra High Density Storage Devices Tech. Dig. Symp. VLSI Technol. 2009, 136-137
-
(2009)
Tech. Dig. Symp. VLSI Technol.
, pp. 136-137
-
-
Katsumata, R.1
Kito, M.2
Fukuzumi, Y.3
Kido, M.4
Tanaka, H.5
Komori, Y.6
Ishiduki, M.7
Matsunami, J.8
Fujiwara, T.9
Nagata, Y.10
-
20
-
-
66449128301
-
Low-Temperature-Grown Transition Metal Oxide Based Storage Materials and Oxide Transistors for High-Density Non-volatile Memory
-
Lee, M.-J.; Kim, S. I.; Lee, C. B.; Yin, H.; Ahn, S.-E.; Kang, B. S.; Kim, K. H.; Park, J. C.; Kim, C. J.; Song, I. et al. Low-Temperature-Grown Transition Metal Oxide Based Storage Materials and Oxide Transistors for High-Density Non-volatile Memory Adv. Funct. Mater. 2009, 19, 1587-1593
-
(2009)
Adv. Funct. Mater.
, vol.19
, pp. 1587-1593
-
-
Lee, M.-J.1
Kim, S.I.2
Lee, C.B.3
Yin, H.4
Ahn, S.-E.5
Kang, B.S.6
Kim, K.H.7
Park, J.C.8
Kim, C.J.9
Song, I.10
-
21
-
-
84855772398
-
A Functional Hybrid Memristor Crossbar-Array CMOS System for Data Storage and Neuromorphic Applications
-
Kim, K.-H.; Gaba, S.; Wheeler, D.; Cruz-Albrecht, J. M.; Hussain, T.; Srinivasa, N.; Lu, W. A Functional Hybrid Memristor Crossbar-Array CMOS System for Data Storage and Neuromorphic Applications Nano Lett. 2012, 12, 389-395
-
(2012)
Nano Lett.
, vol.12
, pp. 389-395
-
-
Kim, K.-H.1
Gaba, S.2
Wheeler, D.3
Cruz-Albrecht, J.M.4
Hussain, T.5
Srinivasa, N.6
Lu, W.7
-
22
-
-
84863017275
-
Realization of Vertical Resistive Memory (VRRAM) Using Cost Effective 3D Process
-
Baek, I. G.; Park, C. J.; Ju, H.; Seong, D. J.; Ahn, H. S.; Kim, J. H.; Yang, M. K; Song, S. H.; Kim, E. M; Park, S. O. et al. Realization of Vertical Resistive Memory (VRRAM) Using Cost Effective 3D Process IEEE Tech. Dig. IEDM 2011, 737-740
-
(2011)
IEEE Tech. Dig. IEDM
, pp. 737-740
-
-
Baek, I.G.1
Park, C.J.2
Ju, H.3
Seong, D.J.4
Ahn, H.S.5
Kim, J.H.6
Yang, M.K.7
Song, S.H.8
Kim, E.M.9
Park, S.O.10
-
23
-
-
84866564550
-
Multi-Layer Sidewall WOX Resistive Memory Suitable for 3D ReRAM
-
Chien, W. C.; Lee, F. M.; Lin, Y. Y.; Lee, H. M.; Chen, S. H.; Hsieh, C. C.; Lai, E. K.; Hui, H. H.; Huang, Y. K.; Yu, C. C. et al. Multi-Layer Sidewall WOX Resistive Memory Suitable for 3D ReRAM Tech. Dig. Symp. VLSI Technol. 2012, 153-154
-
(2012)
Tech. Dig. Symp. VLSI Technol.
, pp. 153-154
-
-
Chien, W.C.1
Lee, F.M.2
Lin, Y.Y.3
Lee, H.M.4
Chen, S.H.5
Hsieh, C.C.6
Lai, E.K.7
Hui, H.H.8
Huang, Y.K.9
Yu, C.C.10
-
24
-
-
79952640478
-
Investigating the Switching Dynamics and Multilevel Capability of Bipolar Metal Oxide Resistive Switching Memory
-
Yu, S.; Wu, Y.; Wong, H.-S. P. Investigating the Switching Dynamics and Multilevel Capability of Bipolar Metal Oxide Resistive Switching Memory Appl. Phys. Lett. 2011, 98, 103514
-
(2011)
Appl. Phys. Lett.
, vol.98
, pp. 103514
-
-
Yu, S.1
Wu, Y.2
Wong, H.-S.P.3
-
25
-
-
76649133422
-
2 Resistive Switching Memory
-
2 Resistive Switching Memory Nat. Nanotechnol. 2010, 5, 148-153
-
(2010)
Nat. Nanotechnol.
, vol.5
, pp. 148-153
-
-
Kwon, D.-H.1
Kim, K.2
Jang, J.3
Jeon, J.4
Lee, M.5
Kim, G.6
Li, X.-S.7
Park, G.-S.8
Lee, B.9
Han, S.10
-
26
-
-
84859218369
-
On the Switching Parameter Variation of Metal Oxide RRAM - Part I: Physical Modeling and Simulation Methodology
-
Guan, X.; Yu, S.; Wong, H.-S. P. On the Switching Parameter Variation of Metal Oxide RRAM-Part I: Physical Modeling and Simulation Methodology IEEE Trans. Electron Devices 2012, 59, 1172-1182
-
(2012)
IEEE Trans. Electron Devices
, vol.59
, pp. 1172-1182
-
-
Guan, X.1
Yu, S.2
Wong, H.-S.P.3
-
27
-
-
56649122022
-
Si, SiGe Nanowire Devices by Top-Down Technology and Their Applications
-
Singh, N.; Buddharaju, K. D.; Manhas, S. K.; Agarwal, A.; Rustagi, S. C.; Lo, G. Q.; Balasubramanian, N.; Kwong, D.-L. Si, SiGe Nanowire Devices by Top-Down Technology and Their Applications IEEE Trans. Electron Devices 2008, 55, 3107-3118
-
(2008)
IEEE Trans. Electron Devices
, vol.55
, pp. 3107-3118
-
-
Singh, N.1
Buddharaju, K.D.2
Manhas, S.K.3
Agarwal, A.4
Rustagi, S.C.5
Lo, G.Q.6
Balasubramanian, N.7
Kwong, D.-L.8
-
28
-
-
78649444385
-
A Phenomenological Model for the Reset Mechanism of Metal Oxide RRAM
-
Yu, S.; Wong, H.-S. P. A Phenomenological Model for the Reset Mechanism of Metal Oxide RRAM IEEE Electron Device Lett. 2010, 31, 1455-1457
-
(2010)
IEEE Electron Device Lett.
, vol.31
, pp. 1455-1457
-
-
Yu, S.1
Wong, H.-S.P.2
-
29
-
-
77957010403
-
Cross-Point Memory Array without Cell Selectors - Device Characteristics and Data Storage Pattern Dependencies
-
Liang, J.; Wong, H.-S. P. Cross-Point Memory Array without Cell Selectors-Device Characteristics and Data Storage Pattern Dependencies IEEE Trans. Electron Devices 2010, 57, 2531-2538
-
(2010)
IEEE Trans. Electron Devices
, vol.57
, pp. 2531-2538
-
-
Liang, J.1
Wong, H.-S.P.2
|