On the switching parameter variation of metal-oxide RRAM - Part I: Physical modeling and simulation methodology

IEEE Transactions on Electron Devices

Volumn 59, Issue 4, 2012, Pages 1172-1182

  Guan, Ximeng ^a   Yu, Shimeng ^a   Wong, H S Philip ^a  

^a Stanford University   (United States)

Author keywords

Device modeling; dielectric breakdown; fluctuations; metal oxide; resistive switching memory (RRAM); switching parameter variation

Indexed keywords

DEVICE MODELING; FLUCTUATIONS; METAL OXIDE; RESISTIVE SWITCHING MEMORIES; SWITCHING PARAMETER VARIATION;

DIELECTRIC MATERIALS; ELECTRIC BREAKDOWN; METALLIC COMPOUNDS; MODELS;

COMPUTER SIMULATION;

EID: 84859218369     PISSN: 00189383     EISSN: None     Source Type: Journal    
DOI: 10.1109/TED.2012.2184545     Document Type: Article

References (40)

1. R. Waser, R. Dittmann, G. Staikov, and K. Szot, "Redox-based resistive switching memories-Nanoionic mechanisms, prospects, and challenges," Adv. Mater., vol. 21, no. 25/26, pp. 2632-2663, Jul. 2009.
2. H. Akinaga and H. Shima, "Resistive random access memory (ReRAM) based on metal oxides," Proc. IEEE, vol. 98, no. 12, pp. 2237-2251, Dec. 2010.
3. S. Yu, B. Lee, and H.-S. P. Wong, "Metal oxide resistive switching memory," in Functional Metal Oxide Nanostructures, J. Q. Wu, Ed. Berlin, Germany: Springer-Verlag, 2011.
4. I. G. Baek, M. S. Lee, S. Seo, M. J. Lee, D. H. Seo, D.-S. Suh, J. C. Park, S. O. Park, H. S. Kim, I. K. Yoo, U.-I. Chung, and I. T. Moon, "Highly scalable nonvolatile resistive memory using simple binary oxide driven by asymmetric unipolar voltage pulses," in IEDM Tech. Dig., 2004, pp. 587-590.
5. W. C. Chien, Y. R. Chen, Y. C. Chen, A. T. H. Chuang, F. M. Lee, Y. Y. Lin, E. K. Lai, Y. H. Shih, K. Y. Hsieh, and C.-Y. Lu, "A formingfree WOx resistive memory using a novel self-aligned field enhancement feature with excellent reliability and scalability," in IEDM Tech. Dig., 2010, pp. 440-443.
6. x based resistive memory with subns switching speed and high endurance," in IEDM Tech. Dig., 2010, pp. 460-463.
7. x RRAM device with excellent switching uniformity and reliability for high-density cross-point memory applications," in IEDM Tech. Dig., 2010, pp. 452-455.
8. Z.Wei, Y. Kanzawa, K. Arita, Y. Katoh, K. Kawai, S. Muraoka, S.Mitani, S. Fujii, K. Katayama, M. Iijima, T. Mikawa, T. Ninomiya, R. Miyanaga, Y. Kawashima, K. Tsuji, A. Himeno, T. Okada, R. Azuma, K. Shimakawa, H. Sugaya, T. Takagi, R. Yasuhara, K. Horiba, H. Kumigashira, and M. Oshima, "Highly reliable TaOx ReRAM and direct evidence of redox reaction mechanism," in IEDM Tech. Dig., 2008, pp. 293-296.
9. M.-J. Lee, C. B. Lee, D. Lee, S. R. Lee, M. Chang, J. H. Hur, Y.-B. Kim, C.-J. Kim, D. H. Seo, S. Seo, U.-I. Chung, I.-K. Yoo, and K. Kim, "A fast, high-endurance and scalable non-volatile memory device made from asymmetric Ta2O5-x/TaO2-x bilayer structures," Nat. Mater., vol. 10, pp. 625-630, Jul. 2011.
10. x RRAM with sub-μA programming current," in VLSI Symp. Tech. Dig., 2011, pp. 22-23.
11. S.-S. Sheu, M.-F. Chang, K.-F. Lin, C.-W. Wu, Y.-S. Chen, P.-F. Chiu, C.-C. Kuo, Y.-S. Yang, P.-C. Chiang, W.-P. Lin, C.-H. Lin, H.-Y. Lee, P.-Y. Gu, S.-M. Wang, F. T. Chen, K.-L. Su, C.-H. Lien, K.-H. Cheng, H.-T. Wu, T.-K. Ku, M.-J. Kao, and M.-J. Tsai, "4 Mb embedded SLC resistive-RAM macro with 7.2 ns read-write random-access time and 160 ns MLC-access capability," in Proc. IEEE ISSCC Tech. Dig., 2011, pp. 200-202.
12. Y. S. Chen, H. Y. Lee, P. S. Chen, P. Y. Gu, C. W. Chen, W. P. Lin, W. H. Liu, Y. Y. Hsu, S. S. Sheu, P. C. Chiang, W. S. Chen, F. T. Chen, C. H. Lien, and M.-J. Tsai, "Highly scalable hafnium oxide memory with improvements of resistive distribution and read disturb immunity," in IEDM Tech. Dig., 2009, pp. 105-108.
13. S. C. Chae, J. S. Lee, S. Kim, S. B. Lee, S. H. Chang, C. Liu, B. Kahng, H. Shin, D.-W. Kim, C. U. Jung, S. Seo, M.-J. Lee, and T. W. Noh, "Random circuit breaker network model for unipolar resistance switching," Adv. Mater., vol. 20, no. 6, pp. 1154-1159, Mar. 2008.
14. X. Guan, S. Yu, and H.-S. P.Wong, "On the switching parameter variation of metal oxide RRAM-Part II: model corroboration and device design strategy," IEEE Trans. Electron Devices, vol. 59, no. 4, pp. 1183-1188, Apr. 2012.
15. S. Yu, Y. Wu, and H.-S. P. Wong, "Investigating the switching dynamics and multilevel capability of bipolar metal oxide resistive switching memory," Appl. Phys. Lett., vol. 98, no. 10, p. 103514, Mar. 2011.
16. S. Yu, Y.Wu, R. Jeyasingh, D. Kuzum, and H.-S. P.Wong, "An electronic synapse device based on metal oxide resistive switching memory for neuromorphic computation," IEEE Trans. Electron Devices, vol. 58, no. 8, pp. 2729-2737, Aug. 2011.
17. N. Xu, B. Gao, L. F. Liu, B. Sun, X. Y. Liu, R. Q. Han, J. F. Kang, and B. Yu, "A unified physical model of switching behavior in oxide-based RRAM," in VLSI Symp. Tech. Dig., 2008, pp. 100-101.
18. M.-J. Lee, S. Han, S. H. Jeon, B. H. Park, B. S. Kang, S.-E. Ahn, K. H. Kim, C. B. Lee, C. J. Kim, I.-K. Yoo, D. H. Seo, X.-S. Li, J.-B. Park, J.-H. Lee, and Y. Park, "Electrical manipulation of nanofilaments in transition-metal oxides for resistance-based memory," Nano Lett., vol. 9, no. 4, pp. 1476-1481, Apr. 2009.
19. 2 resistive switching memory," Nat. Nanotechnol., vol. 5, no. 2, pp. 148-153, Feb. 2010.
20. U. Russo, D. Ielmini, C. Cagli, and A. L. Lacaita, "Self-accelerated thermal dissolution model for reset programming in unipolar resistive switching memory (RRAM) devices," IEEE Trans. Electron Devices, vol. 56, no. 2, pp. 193-200, Feb. 2009.
21. S. Yu and H.-S. P. Wong, "A phenomenological model for the reset mechanism of metal oxide RRAM," IEEE Electron Device Lett., vol. 31, no. 12, pp. 1455-1457, Dec. 2010.
22. S. Blonkowski, "Filamentary model of dielectric breakdown," J. Appl. Phys., vol. 107, no. 8, p. 084109, Apr. 2010.
23. x/Pt resistive switching memory: A trap-assisted-tunneling model," Appl. Phys. Lett., vol. 99, no. 6, p. 063507, Aug. 2011.
24. G. Bersuker, D. C. Gilmer, D. Veksler, J. Yum, H. Park, S. Lian, L. Vandelli, A. Padovani, L. Larcher, K. McKenna, A. Shluger, V. Iglesias, M. Porti, M. Nafría, W. Taylor, P. D. Kirsch, and R. Jammy, "Metal oxide RRAM switching mechanism based on conductive filament microscopic properties," in IEDM Tech. Dig., 2010, pp. 456-459.
25. 2 for resistive switching memory," IEEE Electron Device Lett., vol. 32, no. 2, pp. 197-199, Feb. 2011.
26. B. Gao, B. Sun, H. Zhang, L. F. Liu, X. Y. Liu, R. Q. Han, J. F. Kang, and B. Yu, "Unified physical model of bipolar oxide-based resistive switching memory," IEEE Electron Device Lett., vol. 30, no. 12, pp. 1326-1328, Dec. 2009.
27. 2 high K gate oxide," Microelectron. Eng., vol. 80, no. 1, pp. 408-411, Jun. 2005.
28. K. Tse and J. Robertson, "Defects and their passivation in high K gate oxides," Microelectron. Eng., vol. 84, no. 4, pp. 663-668, Apr. 2007.
29. N. F. Mott and E. A. Davis, Electronic Processes in Non-Crystalline Materials. Oxford, U.K.: Clarendon, 1979.
30. G. Jegert, A. Kersch, W.Weinreich, U. Schröder, and P. Lugli, "Modeling of leakage currents in high-k dielectrics: Three-dimensional approach via kinetic Monte Carlo," Appl. Phys. Lett., vol. 96, no. 6, p. 062113, Feb. 2010.
31. D. Ielmini and Y. Zhang, "Analytical model for subthreshold conduction and threshold switching in chalcogenide-based memory devices," J. Appl. Phys., vol. 102, no. 5, p. 054517, Sep. 2007.
32. W. J. Zhu, T.-P. Ma, T. Tamagawa, J. Kim, and Y. Di, "Current transport in metal/hafnium oxide/silicon structure," IEEE Electron Device Lett., vol. 23, no. 2, pp. 97-99, Feb. 2002.
33. L. Larcher, "Statistical simulation of leakage currents in MOS and flash memory devices with a new multiphonon trap-assisted tunneling model," IEEE Trans. Electron Devices, vol. 50, no. 5, pp. 1246-1253, May 2003.
34. N. F. Mott and R. W. Gurney, Electronic Processes in Ionic Crystals. Oxford, U.K.: Dover, 1948.
35. B. Gao, J. F. Kang, H. W. Zhang, B. Sun, B. Chen, L. F. Liu, X. Y. Liu, R. Q. Han, Y. Y. Wang, B. Yu, Z. Fang, H. Y. Yu, and D.-L. Kwong, "Oxide-based RRAM: physical based retention projection," in Proc. ESSDERC, 2010, pp. 392-395.
36. 2 metal-insulator-metal devices," J. Appl. Phys., vol. 107, no. 7, p. 074507, Apr. 2010.
37. J. Mcpherson, J.-Y. Kim, A. Shanware, and H. Mogul, "Thermochemical description of dielectric breakdown in high dielectric constant materials," Appl. Phys. Lett., vol. 82, no. 13, pp. 2121-2123, Mar. 2003.
38. 2-based resistive switching memories," in Proc. IEEE Int. Memory Workshop, 2011, pp. 119-122.
39. E. W. Dijkstra, "A note on two problems in connexion with graphs," Numerische Mathematik, vol. 1, no. 1, pp. 269-271, Dec. 1959.
40. x based resistive memory and its solution," in VLSI Symp. Tech. Dig., 2011, pp. 108-109.