Centip3De: A cluster-based NTC architecture with 64 ARM cortex-M3 cores in 3D stacked 130 nm CMOS

IEEE Journal of Solid-State Circuits

Volumn 48, Issue 1, 2013, Pages 104-117

  Fick, David ^a   Dreslinski, Ronald G ^a   Giridhar, Bharan ^a   Kim, Gyouho ^a   Seo, Sangwon ^a   Fojtik, Matthew ^a   Satpathy, Sudhir ^a   Lee, Yoonmyung ^a   Kim, Daeyeon ^a   Liu, Nurrachman ^a   Wieckowski, Michael ^a   Chen, Gregory ^a   Mudge, Trevor ^a   Blaauw, David ^a   Sylvester, Dennis ^a  

^a UNIVERSITY OF MICHIGAN   (United States)

Author keywords

3D integrated circuits; energy efficient; many core architectures; Near threshold computing; through silicon vias

Indexed keywords

3-D INTEGRATED CIRCUIT; ENERGY EFFICIENT; MANY-CORE ARCHITECTURE; NEAR-THRESHOLD COMPUTING; THROUGH SILICON VIAS;

COMPUTER ARCHITECTURE; DESIGN; ENERGY EFFICIENCY; THREE DIMENSIONAL COMPUTER GRAPHICS;

CLUSTER COMPUTING;

EID: 84872170430     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSSC.2012.2222814     Document Type: Article

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