A 65 nm Sub-t microcontroller with integrated SRAM and switched capacitor DC-DC converter

IEEE Journal of Solid-State Circuits

Volumn 44, Issue 1, 2009, Pages 115-126

  Kwong, Joyce ^a   Ramadass, Yogesh K ^a   Verma, Naveen ^a   Chandrakasan, Anantha P ^a  

^a Massachusetts Institute of Technology Cambridge   (United States)

Author keywords

CMOS digital integrated circuits; DC DC conversion; Leakage currents; Logic design; Low power electronics; SRAM; Subthreshold

Indexed keywords

APPLICATION SPECIFIC INTEGRATED CIRCUITS; CAPACITANCE; CAPACITORS; CMOS INTEGRATED CIRCUITS; CONTROL SYSTEM STABILITY; DC-DC CONVERTERS; DIELECTRIC DEVICES; DIGITAL CIRCUITS; DIGITAL INTEGRATED CIRCUITS; ELECTRIC EQUIPMENT; HVDC POWER TRANSMISSION; INTEGRATED CIRCUITS; LEAKAGE CURRENTS; LOGIC DESIGN; MICROCONTROLLERS; POWER CONVERTERS; POWER ELECTRONICS; STATIC RANDOM ACCESS STORAGE; SWITCHING THEORY;

CMOS DIGITAL INTEGRATED CIRCUITS; DC-DC CONVERSION; LOW-POWER ELECTRONICS; SRAM; SUBTHRESHOLD;

LOGIC CIRCUITS;

EID: 58149234982     PISSN: 00189200     EISSN: None     Source Type: Journal    
DOI: 10.1109/JSSC.2008.2007160     Document Type: Conference Paper

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