High performance, low cost, and robust soft error tolerant latch designs for nanoscale CMOS technology

IEEE Transactions on Circuits and Systems I: Regular Papers

Volumn 59, Issue 7, 2012, Pages 1445-1457

  Nan, Haiqing ^a   Choi, Ken ^a  

^a Illinois Institute of Technology   (United States)

Author keywords

circuit reliability; radiation hardening; soft error; static latch; Transient fault

Indexed keywords

COSTS; RADIATION HARDENING;

CIRCUIT RELIABILITY; CMOS TRANSISTORS; INTERNAL NODES; NANO-SCALE CMOS; POWER DELAY PRODUCT; SOFT ERROR; STATIC LATCH; TRANSIENT FAULTS;

CMOS INTEGRATED CIRCUITS;

EID: 84862983273     PISSN: 15498328     EISSN: None     Source Type: Journal    
DOI: 10.1109/TCSI.2011.2177135     Document Type: Article

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