On the scalability of redundancy based SER mitigation schemes

Proceedings 2007 IEEE International Conference on Integrated Circuit Design and Technology, ICICDT

Volumn , Issue , 2007, Pages 197-205

  Seifert, Norbert ^a,b   Gill, Balkaran ^b   Zia, Victor ^a,b   Zhang, Ming ^a,b   Ambrose, Vinod ^a,b  

^a IEEE

^b INTEL CORPORATION   (United States)

Author keywords

BISER; Charge sharing; DICE; MBU; Radiation; Redundancy; SER; SET; SEUT; Soft error

Indexed keywords

ERROR ANALYSIS; HARDENING; INTEGRATED CIRCUITS; QUALITY ASSURANCE; RADIATION HARDENING; RADIATION PROTECTION; REDUNDANCY; RELIABILITY; STANDARDS; TECHNOLOGY;

CHARGE SHARING; CIRCUIT LEVEL SIMULATIONS; INTEGRATED CIRCUIT (IC) DESIGN; INTERNATIONAL CONFERENCES; LOS ALAMOS NATIONAL LABORATORY (LANL); MITIGATION SCHEMES; MITIGATION TECHNIQUES; RADIATION-HARDENED; SOFT ERROR RATES (SER);

INTEGRATED CIRCUIT MANUFACTURE;

EID: 47349096208     PISSN: None     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1109/ICICDT.2007.4299573     Document Type: Conference Paper

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