-
1
-
-
77950852717
-
Memristive switches enable 'stateful' logic operations via material implication
-
J. Borghetti, G. Snider, P. Kuekes, J. Yang, D. Stewart, and R. Williams. Memristive switches enable 'stateful' logic operations via material implication. Nature, 464:873-876, 2010.
-
(2010)
Nature
, vol.464
, pp. 873-876
-
-
Borghetti, J.1
Snider, G.2
Kuekes, P.3
Yang, J.4
Stewart, D.5
Williams, R.6
-
6
-
-
70350714582
-
Pdram: A hybrid pram and dram main memory system
-
G. Dhiman and et al. Pdram: A hybrid pram and dram main memory system. In Design Automation Conference, 2009.
-
(2009)
Design Automation Conference
-
-
Dhiman, G.1
-
7
-
-
34247155811
-
Spin-transfer torque switching in magnetic tunnel junctions and spin-transfer torque random access memory
-
13pp
-
Z. Diao, Z. Li, S. Wang, Y. Ding, A. Panchula, and et al. Spin-Transfer Torque Switching in Magnetic Tunnel Junctions and Spin-Transfer Torque Random Access Memory. Journal of Physics: Condensed Matter, 19(16):165209 (13pp), 2007.
-
(2007)
Journal of Physics: Condensed Matter
, vol.19
, Issue.16
, pp. 165209
-
-
Diao, Z.1
Li, Z.2
Wang, S.3
Ding, Y.4
Panchula, A.5
-
8
-
-
34247155811
-
Spin-transfer torque switching in magnetic tunnel junctions and spin-transfer torque random access memory
-
Z. Diao, S. W. Z. Li, Y. Ding, A. Panchula, E. Chen, L.-C. Wang, and Y. Huai. Spin-transfer torque switching in magnetic tunnel junctions and spin-transfer torque random access memory. Journal of Physics: Condensed Matter, 19(16):165209.
-
Journal of Physics: Condensed Matter
, vol.19
, Issue.16
, pp. 165209
-
-
Diao, Z.1
Li, S.W.Z.2
Ding, Y.3
Panchula, A.4
Chen, E.5
Wang, L.-C.6
Huai, Y.7
-
9
-
-
51549109199
-
Circuit and microarchitecture evaluation of 3d stacking magnetic ram (mram) as a universal memory replacement
-
X. Dong, X. Wu, G. Sun, Y. Xie, H. Li, and Y. Chen. Circuit and microarchitecture evaluation of 3d stacking magnetic ram (mram) as a universal memory replacement. In Design Automation Conference, pages 554-559, 2008.
-
(2008)
Design Automation Conference
, pp. 554-559
-
-
Dong, X.1
Wu, X.2
Sun, G.3
Xie, Y.4
Li, H.5
Chen, Y.6
-
10
-
-
81355159292
-
Phase change memory (pcm): A new memory technology to enable new memory usage models
-
S. Eilert and et al. Phase change memory (pcm): A new memory technology to enable new memory usage models. Numonyx white paper, 2009.
-
(2009)
Numonyx White Paper
-
-
Eilert, S.1
-
11
-
-
32944481005
-
Development of the magnetic tunnel junction mram at ibm: From first junctions to a 16-mb mram demonstrator chip
-
W. J. Gallagher and S. S. P. Parkin. Development of the magnetic tunnel junction mram at ibm: From first junctions to a 16-mb mram demonstrator chip. IBM Journal of Research and Development, 50(1):5-23, 2006.
-
(2006)
IBM Journal of Research and Development
, vol.50
, Issue.1
, pp. 5-23
-
-
Gallagher, W.J.1
Parkin, S.S.P.2
-
13
-
-
33847743417
-
A novel non-volatile memory with spin torque transfer magnetization switching: Spin-RAM
-
M. Hosomi, H. Yamagishi, T. Yamamoto, K. Bessho, Y. Higo, and et al. A Novel Non-Volatile Memory With Spin Torque Transfer Magnetization Switching: Spin-RAM. In Proceedings of IEDM, pages 459-462, 2005.
-
(2005)
Proceedings of IEDM
, pp. 459-462
-
-
Hosomi, M.1
Yamagishi, H.2
Yamamoto, T.3
Bessho, K.4
Higo, Y.5
-
14
-
-
81355145526
-
Reducing write activities on non-volatile memories in embedded cmps via data migration and recomputation
-
and
-
J. Hu and et al. Reducing write activities on non-volatile memories in embedded cmps via data migration and recomputation. In Design Automation Conference, 2010.
-
(2010)
Design Automation Conference
-
-
Hu, J.1
-
15
-
-
81355128563
-
-
M. Inc. http://www.micron.com/products/pcm/.
-
M. Inc.
-
-
-
16
-
-
80052736226
-
Enhancing phase change memory lifetime through fine-grained current regulation and voltage upscaling
-
L. Jiang and et al. Enhancing phase change memory lifetime through fine-grained current regulation and voltage upscaling. In International Symposium on Low Power Electronics and Design, 2011.
-
(2011)
International Symposium on Low Power Electronics and Design
-
-
Jiang, L.1
-
19
-
-
77949611974
-
Phase-change technology and the future of main memory
-
B. Lee. Phase-change technology and the future of main memory. In IEEE Micro, 2010.
-
(2010)
IEEE Micro
-
-
Lee, B.1
-
20
-
-
79960642086
-
A fast, high-endurance and scalable non-volatile memory device made from asymmetric ta2o5-x/tao2-x bilayer structures
-
xbilayer structures. Nature Mater, 10:625-630, 2011.
-
(2011)
Nature Mater
, vol.10
, pp. 625-630
-
-
Lee, M.-J.1
Lee, C.B.2
Lee, D.3
Lee, S.R.4
Chang, M.5
Hur, J.H.6
Kim, Y.-B.7
Kim, C.-J.8
Seo, D.H.9
Seo, S.10
Chung, U.I.11
Yoo, I.-K.12
Kim, K.13
-
21
-
-
70350074635
-
An overview of non-volatile memory technology and the implication for tools and architectures
-
H. Li and Y. Chen. An overview of non-volatile memory technology and the implication for tools and architectures. In Design, Automation and Test in Europe Conference and Exhibition, pages 731-736, 2009.
-
(2009)
Design, Automation and Test in Europe Conference and Exhibition
, pp. 731-736
-
-
Li, H.1
Chen, Y.2
-
22
-
-
80052676081
-
Power-aware variable partitioning for dsps with hybrid pram and dram main memory
-
T. Liu and et al. Power-aware variable partitioning for dsps with hybrid pram and dram main memory. In Design Automation Conference, 2011.
-
(2011)
Design Automation Conference
-
-
Liu, T.1
-
23
-
-
57849086461
-
Demonstration of multilevel cell spin transfer switching in mgo magnetic tunnel junctions
-
X. Lou, Z. Gao, D. V. Dimitrov, and M. Tang. Demonstration of multilevel cell spin transfer switching in mgo magnetic tunnel junctions. Applied Physics Letter, 93:242502.
-
Applied Physics Letter
, vol.93
, pp. 242502
-
-
Lou, X.1
Gao, Z.2
Dimitrov, D.V.3
Tang, M.4
-
24
-
-
47349084021
-
Optimizing NUCA organizations and wiring alternatives for large caches with CACTI 6.0
-
N. Muralimanohar, R. Balasubramonian, and N. Jouppi. Optimizing NUCA Organizations and Wiring Alternatives for Large Caches with CACTI 6.0. In Proceedings of MICRO, pages 3-14, 2007.
-
(2007)
Proceedings of MICRO
, pp. 3-14
-
-
Muralimanohar, N.1
Balasubramonian, R.2
Jouppi, N.3
-
25
-
-
84883679883
-
Enhancing lifetime and security of pcm-based main memory with start-gap wear leveling
-
M. Qureshi and et al. Enhancing lifetime and security of pcm-based main memory with start-gap wear leveling. In International Symposium on Microarchitecture, 2009.
-
(2009)
International Symposium on Microarchitecture
-
-
Qureshi, M.1
-
26
-
-
70450273507
-
Scalable high performance main memory system using phase-change memory technology
-
M. Qureshi and et al. Scalable high performance main memory system using phase-change memory technology. In International Symposium on Computer Architecture, 2009.
-
(2009)
International Symposium on Computer Architecture
-
-
Qureshi, M.1
-
27
-
-
67650156213
-
Analytical model for reset operation of phase change memory
-
B. Rajendran and et al. Analytical model for reset operation of phase change memory. In IEEE IEDM, 2008.
-
(2008)
IEEE IEDM
-
-
Rajendran, B.1
-
28
-
-
55449106208
-
Phase-change random access memory: A scalable technology
-
S. Raoux and et al. Phase-change random access memory: A scalable technology. IBM J. Res. & Dev., 52(4/5):465-479, 2008.
-
(2008)
IBM J. Res. & Dev.
, vol.52
, Issue.4-5
, pp. 465-479
-
-
Raoux, S.1
-
30
-
-
77954961189
-
Security refresh: Prevent malicious wear-out and increase durability for phase-change memory with dynamically randomized address mapping
-
N. H. Seong and et al. Security refresh: prevent malicious wear-out and increase durability for phase-change memory with dynamically randomized address mapping. In International Symposium on Computer Architecture, 2010.
-
(2010)
International Symposium on Computer Architecture
-
-
Seong, N.H.1
-
32
-
-
43049126833
-
The missing memristor found
-
D. B. Strukov, G. S. Snider, D. R. Stewart, and R. S. Williams. The missing memristor found. Nature 453, pages 80-83, 2008.
-
(2008)
Nature
, vol.453
, pp. 80-83
-
-
Strukov, D.B.1
Snider, G.S.2
Stewart, D.R.3
Williams, R.S.4
-
33
-
-
81355128556
-
-
K. Szot, W. Speier, G. Bihlmayer, and R. Waser
-
K. Szot, W. Speier, G. Bihlmayer, and R. Waser.
-
-
-
-
35
-
-
81355159290
-
-
R. K. C. V. V. Zhirnov, R. Meade and G. Sandhu
-
R. K. C. V. V. Zhirnov, R. Meade and G. Sandhu.
-
-
-
-
36
-
-
70350582416
-
Spin torque random access memory down to 22nm technology
-
X.Wang, Y. Chen, H. Li, H. Liu, and D. V. Dimitrov. Spin torque random access memory down to 22nm technology. IEEE Transaction on Magnetics, 44(11):2479-2482, 2008.
-
(2008)
IEEE Transaction on Magnetics
, vol.44
, Issue.11
, pp. 2479-2482
-
-
Wang, X.1
Chen, Y.2
Li, H.3
Liu, H.4
Dimitrov, D.V.5
-
37
-
-
67650102619
-
Redox-based resistive switching memoriesĺ cnanoionic mechanisms, prospects, and challenges
-
R. Waser, R. Dittmann, G. Staikov, and K. Szot. Redox-based resistive switching memoriesĺ cnanoionic mechanisms, prospects, and challenges. Adv. Mater., 21:2632-2663, 2009.
-
(2009)
Adv. Mater
, vol.21
, pp. 2632-2663
-
-
Waser, R.1
Dittmann, R.2
Staikov, G.3
Szot, K.4
-
38
-
-
72849144796
-
Memristor-cmos hybrid integrated circuits for reconfigurable logic
-
Q. F. Xia, W. Robinett, M. W. Cumbie, N. Banerjee, T. J. Cardinali, J. J. Yang, W. Wu, X. M. Li, W. M. Tong, D. B. Strukov, G. S. Snider, G. Medeiros-Ribeiro, and R. S. Williams. Memristor-cmos hybrid integrated circuits for reconfigurable logic. Nano Lett., 9:3640-3645, 2009.
-
(2009)
Nano Lett.
, vol.9
, pp. 3640-3645
-
-
Xia, Q.F.1
Robinett, W.2
Cumbie, M.W.3
Banerjee, N.4
Cardinali, T.J.5
Yang, J.J.6
Wu, W.7
Li, X.M.8
Tong, W.M.9
Strukov, D.B.10
Snider, G.S.11
Medeiros-Ribeiro, G.12
Williams, R.S.13
-
39
-
-
70349778694
-
A family of electronically reconfigurable nanodevices
-
J. J. Yang, J. Borghetti, D. Murphy, D. R. Stewart, and R. S. Williams. A family of electronically reconfigurable nanodevices. Adv. Mater., 21:3754-3758, 2009.
-
(2009)
Adv. Mater
, vol.21
, pp. 3754-3758
-
-
Yang, J.J.1
Borghetti, J.2
Murphy, D.3
Stewart, D.R.4
Williams, R.S.5
-
40
-
-
78751561498
-
Dopant control by atomic layer deposition in oxide films for memristive switches
-
J. J. Yang, N. P. Kobayashi, J. P. Strachan, M. X. Zhang, D. A. A. Ohlberg, M. D. Pickett, Z. Li, G. Medeiros-Ribeiro, and R. S. Williams. Dopant control by atomic layer deposition in oxide films for memristive switches. Chem. Mater., 23:123-125, 2011.
-
(2011)
Chem. Mater
, vol.23
, pp. 123-125
-
-
Yang, J.J.1
Kobayashi, N.P.2
Strachan, J.P.3
Zhang, M.X.4
Ohlberg, D.A.A.5
Pickett, M.D.6
Li, Z.7
Medeiros-Ribeiro, G.8
Williams, R.S.9
-
41
-
-
67649143212
-
The mechanism of electroforming of metal oxide memristive switches
-
9
-
J. J. Yang, F. Miao, M. D. Pickett, D. A. A. Ohlberg, D. R. Stewart, C. N. Lau, and R. S. Williams. The mechanism of electroforming of metal oxide memristive switches. Nanotechnology, 20:215201, 9pp, 2009.
-
(2009)
Nanotechnology
, vol.20
, pp. 215201
-
-
Yang, J.J.1
Miao, F.2
Pickett, M.D.3
Ohlberg, D.A.A.4
Stewart, D.R.5
Lau, C.N.6
Williams, R.S.7
-
42
-
-
46749093701
-
Memristive switching mechanism for metal/oxide/metal nanodevices
-
J. J. Yang, M. D. Picketta, X. Li, D. A. A. Ohlberg, D. R. Stewart, and R. S. Williams. Memristive switching mechanism for metal/oxide/metal nanodevices. Nature Nanotechnology, 3:429-433, 2008.
-
(2008)
Nature Nanotechnology
, vol.3
, pp. 429-433
-
-
Yang, J.J.1
Picketta, M.D.2
Li, X.3
Ohlberg, D.A.A.4
Stewart, D.R.5
Williams, R.S.6
-
43
-
-
79959353918
-
Metal/tio2 interfaces for memristive switches
-
J. J. Yang, J. Strachan, F. Miao, M.-X. Zhang, M. Pickett, W. Yi, D. Ohlberg, G. Medeiros-Ribeiro, and R. Williams. Metal/tio2 interfaces for memristive switches. Appl. Phys. A, 102:785-789, 2011.
-
(2011)
Appl. Phys. A
, vol.102
, pp. 785-789
-
-
Yang, J.J.1
Strachan, J.2
Miao, F.3
Zhang, M.-X.4
Pickett, M.5
Yi, W.6
Ohlberg, D.7
Medeiros-Ribeiro, G.8
Williams, R.9
-
44
-
-
77957585627
-
Diffusion of adhesion layer metals controls nanoscale memristive switching
-
J. J. Yang, J. P. Strachan, Q. Xia, D. A. A. Ohlberg, P. J. Kuekes, R. D. Kelley, W. F. Stickle, D. R. Stewart, G. Medeiros-Ribeiro, and R. S. Williams. Diffusion of adhesion layer metals controls nanoscale memristive switching. Adv. Mater., 22:4034-4038, 2010.
-
(2010)
Adv. Mater
, vol.22
, pp. 4034-4038
-
-
Yang, J.J.1
Strachan, J.P.2
Xia, Q.3
Ohlberg, D.A.A.4
Kuekes, P.J.5
Kelley, R.D.6
Stickle, W.F.7
Stewart, D.R.8
Medeiros-Ribeiro, G.9
Williams, R.S.10
-
45
-
-
70450225732
-
Memory mapped ECC: Low-cost error protection for last level caches
-
D. H. Yoon and M. Erez. Memory mapped ECC: low-cost error protection for last level caches. In Proceedings of ISCA, pages 116-127, 2009.
-
(2009)
Proceedings of ISCA
, pp. 116-127
-
-
Yoon, D.H.1
Erez, M.2
-
46
-
-
76749137639
-
Characterizing and mitigating the impact of process variations on phase change based memory systems
-
W. Zhang and et al. Characterizing and mitigating the impact of process variations on phase change based memory systems. In International Symposium on Microarchitecture, 2009.
-
(2009)
International Symposium on Microarchitecture
-
-
Zhang, W.1
-
47
-
-
70449623993
-
Exploring phase change memory and 3d die-stacking for power/thermal friendly, fast and durable memory architectures
-
W. Zhang and et al. Exploring phase change memory and 3d die-stacking for power/thermal friendly, fast and durable memory architectures. In International Conference on Parallel Architectures and Compilation Techniques, 2009.
-
(2009)
International Conference on Parallel Architectures and Compilation Techniques
-
-
Zhang, W.1
-
48
-
-
43549121995
-
Macro-model of spin-transfer torque based magnetic tunnel junction device for hybrid magnetic-CMOS design
-
W. Zhao, E. Belhaire, Q. Mistral, C. Chappert, V. Javerliac, and et al. Macro-model of Spin-Transfer Torque based Magnetic Tunnel Junction Device for Hybrid Magnetic-CMOS Design. In IEEE International Behavioral Modeling and Simulation Workshop, pages 40-43, 2006.
-
(2006)
IEEE International Behavioral Modeling and Simulation Workshop
, pp. 40-43
-
-
Zhao, W.1
Belhaire, E.2
Mistral, Q.3
Chappert, C.4
Javerliac, V.5
-
49
-
-
46749099399
-
Nanodevices: Charge of the heavy brigade
-
V. V. Zhirnov and R. K. Cavin. Nanodevices: Charge of the heavy brigade. Nat Nano, 3:377-378, 2008.
-
(2008)
Nat Nano
, vol.3
, pp. 377-378
-
-
Zhirnov, V.V.1
Cavin, R.K.2
-
50
-
-
70450277571
-
A durable and energy efficient main memory using phase change memory technology
-
P. Zhou and et al. A durable and energy efficient main memory using phase change memory technology. In International Symposium on Computer Architecture, 2009.
-
(2009)
International Symposium on Computer Architecture
-
-
Zhou, P.1
|