Use ECP, not ECC, for hard failures in resistive memories

Proceedings - International Symposium on Computer Architecture

Volumn , Issue , 2010, Pages 141-152

  Schechter, Stuart ^a   Loh, Gabriel H ^b   Strauss, Karin ^a   Burger, Doug ^a  

^a MICROSOFT RESEARCH   (United States)

^b GEORGIA INSTITUTE OF TECHNOLOGY   (United States)

Author keywords

Error correction; Hard failures; Memory; Phase change memory; Resistive memories

Indexed keywords

CHARGE STORAGE; CURRENT ERROR; ECC CODES; EFFECTIVE LIFETIME; HARD FAILURES; IN-CELL; MEMORY TECHNOLOGY; NEW APPROACHES; NON-VOLATILE; PROCESS SCALING; TRANSIENT FAULTS; WEAR LIFETIME;

COMPUTER ARCHITECTURE; COMPUTERS; ERROR CORRECTION; PHASE CHANGE MEMORY;

DYNAMIC RANDOM ACCESS STORAGE;

EID: 77954982649     PISSN: 10636897     EISSN: None     Source Type: Conference Proceeding    
DOI: 10.1145/1815961.1815980     Document Type: Conference Paper

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